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ARM: Merge for-2635/s3c6410-clock 

Merge branch 'for-2635/s3c6410-clock' into for-linus/samsung2
This commit is contained in:
Ben Dooks 2010-05-19 18:04:09 +09:00
parent ff1b8ba01d 05e021f095
commit 2abbfb26de
3 changed files with 38 additions and 0 deletions
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36
arch/arm/mach-s3c64xx/clock.c
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@ -88,6 +88,12 @@ struct clk clk_48m = {
.enable = clk_48m_ctrl, .enable = clk_48m_ctrl,
}; };
struct clk clk_xusbxti = {
.name = "xusbxti",
.id = -1,
.rate = 48000000,
};
static int inline s3c64xx_gate(void __iomem *reg, static int inline s3c64xx_gate(void __iomem *reg,
struct clk *clk, struct clk *clk,
int enable) int enable)
@ -518,6 +524,11 @@ static struct clk clk_iis_cd1 = {
.id = -1, .id = -1,
}; };
static struct clk clk_iisv4_cd = {
.name = "iis_cdclk_v4",
.id = -1,
};
static struct clk clk_pcm_cd = { static struct clk clk_pcm_cd = {
.name = "pcm_cdclk", .name = "pcm_cdclk",
.id = -1, .id = -1,
@ -549,6 +560,19 @@ static struct clksrc_sources clkset_audio1 = {
.nr_sources = ARRAY_SIZE(clkset_audio1_list), .nr_sources = ARRAY_SIZE(clkset_audio1_list),
}; };
static struct clk *clkset_audio2_list[] = {
[0] = &clk_mout_epll.clk,
[1] = &clk_dout_mpll,
[2] = &clk_fin_epll,
[3] = &clk_iisv4_cd,
[4] = &clk_pcm_cd,
};
static struct clksrc_sources clkset_audio2 = {
.sources = clkset_audio2_list,
.nr_sources = ARRAY_SIZE(clkset_audio2_list),
};
static struct clk *clkset_camif_list[] = { static struct clk *clkset_camif_list[] = {
&clk_h2, &clk_h2,
}; };
@ -650,6 +674,16 @@ static struct clksrc_clk clksrcs[] = {
.reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 }, .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 },
.reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 },
.sources = &clkset_audio1, .sources = &clkset_audio1,
}, {
.clk = {
.name = "audio-bus",
.id = -1, /* There's only one IISv4 port */
.ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2,
.enable = s3c64xx_sclk_ctrl,
},
.reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 },
.reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 },
.sources = &clkset_audio2,
}, { }, {
.clk = { .clk = {
.name = "irda-bus", .name = "irda-bus",
@ -749,6 +783,7 @@ static struct clk *clks1[] __initdata = {
&clk_ext_xtal_mux, &clk_ext_xtal_mux,
&clk_iis_cd0, &clk_iis_cd0,
&clk_iis_cd1, &clk_iis_cd1,
&clk_iisv4_cd,
&clk_pcm_cd, &clk_pcm_cd,
&clk_mout_epll.clk, &clk_mout_epll.clk,
&clk_mout_mpll.clk, &clk_mout_mpll.clk,
@ -762,6 +797,7 @@ static struct clk *clks[] __initdata = {
&clk_27m, &clk_27m,
&clk_48m, &clk_48m,
&clk_h2, &clk_h2,
&clk_xusbxti,
}; };
/** /**

1
arch/arm/mach-s3c64xx/include/mach/regs-clock.h
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@ -33,6 +33,7 @@
#define S3C_PCLK_GATE S3C_CLKREG(0x34) #define S3C_PCLK_GATE S3C_CLKREG(0x34)
#define S3C_SCLK_GATE S3C_CLKREG(0x38) #define S3C_SCLK_GATE S3C_CLKREG(0x38)
#define S3C_MEM0_GATE S3C_CLKREG(0x3C) #define S3C_MEM0_GATE S3C_CLKREG(0x3C)
#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C)
/* CLKDIV0 */ /* CLKDIV0 */
#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) #define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12)

1
arch/arm/plat-samsung/include/plat/clock.h
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@ -74,6 +74,7 @@ extern struct clk clk_ext;
extern struct clk clk_h2; extern struct clk clk_h2;
extern struct clk clk_27m; extern struct clk clk_27m;
extern struct clk clk_48m; extern struct clk clk_48m;
extern struct clk clk_xusbxti;
extern int clk_default_setrate(struct clk *clk, unsigned long rate); extern int clk_default_setrate(struct clk *clk, unsigned long rate);
extern struct clk_ops clk_ops_def_setrate; extern struct clk_ops clk_ops_def_setrate;