diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c index 89faa603c6be..6386f63c413e 100644 --- a/arch/ia64/kernel/palinfo.c +++ b/arch/ia64/kernel/palinfo.c @@ -240,7 +240,7 @@ cache_info(char *page) } p += sprintf(p, "%s Cache level %lu:\n" - "\tSize : %lu bytes\n" + "\tSize : %u bytes\n" "\tAttributes : ", cache_types[j+cci.pcci_unified], i+1, cci.pcci_cache_size); @@ -648,9 +648,9 @@ frequency_info(char *page) if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0; p += sprintf(p, - "Processor/Clock ratio : %ld/%ld\n" - "Bus/Clock ratio : %ld/%ld\n" - "ITC/Clock ratio : %ld/%ld\n", + "Processor/Clock ratio : %d/%d\n" + "Bus/Clock ratio : %d/%d\n" + "ITC/Clock ratio : %d/%d\n", proc.num, proc.den, bus.num, bus.den, itc.num, itc.den); return p - page; diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c index ac167436e936..49958904045b 100644 --- a/arch/ia64/kernel/time.c +++ b/arch/ia64/kernel/time.c @@ -188,7 +188,7 @@ ia64_init_itm (void) itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den; local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ; - printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%lu/%lu, " + printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " "ITC freq=%lu.%03luMHz", smp_processor_id(), platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000, itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000); diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 5d229c5953e9..37e52a2836b0 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h @@ -131,7 +131,7 @@ typedef u64 pal_cache_line_state_t; #define PAL_CACHE_LINE_STATE_MODIFIED 3 /* Modified */ typedef struct pal_freq_ratio { - u64 den : 32, num : 32; /* numerator & denominator */ + u32 den, num; /* numerator & denominator */ } itc_ratio, proc_ratio; typedef union pal_cache_config_info_1_s { @@ -152,10 +152,10 @@ typedef union pal_cache_config_info_1_s { typedef union pal_cache_config_info_2_s { struct { - u64 cache_size : 32, /*cache size in bytes*/ + u32 cache_size; /*cache size in bytes*/ - alias_boundary : 8, /* 39-32 aliased addr + u32 alias_boundary : 8, /* 39-32 aliased addr * separation for max * performance. */