MIPS: Netlogic: Add support for XLP 3XX cores
Add new processor ID to asm/cpu.h and kernel/cpu-probe.c. Update to new CPU frequency detection code which works on XLP 3XX and 8XX. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2971/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -170,7 +170,9 @@
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#define PRID_IMP_NETLOGIC_XLS408B 0x4e00
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#define PRID_IMP_NETLOGIC_XLS404B 0x4f00
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#define PRID_IMP_NETLOGIC_XLP832 0x1000
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#define PRID_IMP_NETLOGIC_XLP8XX 0x1000
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#define PRID_IMP_NETLOGIC_XLP3XX 0x1100
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/*
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* Definitions for 7:0 on legacy processors
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*/
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@ -1025,7 +1025,8 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
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MIPS_CPU_LLSC);
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_NETLOGIC_XLP832:
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case PRID_IMP_NETLOGIC_XLP8XX:
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case PRID_IMP_NETLOGIC_XLP3XX:
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c->cputype = CPU_XLP;
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__cpu_name[cpu] = "Netlogic XLP";
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break;
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@ -86,20 +86,26 @@ int nlm_irt_to_irq(int irt)
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}
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}
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unsigned int nlm_get_cpu_frequency(void)
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unsigned int nlm_get_core_frequency(int core)
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{
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unsigned int pll_divf, pll_divr, dfs_div, denom;
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unsigned int val;
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unsigned int pll_divf, pll_divr, dfs_div, ext_div;
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unsigned int rstval, dfsval, denom;
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uint64_t num;
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val = nlm_read_sys_reg(nlm_sys_base, SYS_POWER_ON_RESET_CFG);
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pll_divf = (val >> 10) & 0x7f;
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pll_divr = (val >> 8) & 0x3;
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dfs_div = (val >> 17) & 0x3;
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rstval = nlm_read_sys_reg(nlm_sys_base, SYS_POWER_ON_RESET_CFG);
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dfsval = nlm_read_sys_reg(nlm_sys_base, SYS_CORE_DFS_DIV_VALUE);
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pll_divf = ((rstval >> 10) & 0x7f) + 1;
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pll_divr = ((rstval >> 8) & 0x3) + 1;
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ext_div = ((rstval >> 30) & 0x3) + 1;
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dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1;
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num = pll_divf + 1;
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denom = 3 * (pll_divr + 1) * (1 << (dfs_div + 1));
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num = num * 800000000ULL;
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num = 800000000ULL * pll_divf;
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denom = 3 * pll_divr * ext_div * dfs_div;
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do_div(num, denom);
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return (unsigned int)num;
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}
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unsigned int nlm_get_cpu_frequency(void)
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{
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return nlm_get_core_frequency(0);
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}
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