Memory controller drivers for v5.17 - OMAP GPMC
1. Add support for AM64 SoC. 2. Minor improvement: use platform_get_irq(). -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHFq0cQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD18wsD/0efj2Ex0um0R1w8RyesHbQZW3XNOApncRY 52vNV77QDtrgOwZpMIU0t+WW0vAqBQ9vXxZ8J/XtsyfkYHymGJLBzLClVeddXRv/ mOrnVYnNxpySRBDJnbzXge2w53U2mCnIJHe490/y3RlNKmxibvRUGcaR8egDaRmu JyIjKgMqC5S4D0/qIYm3EgvWG6t2bEHF3E/wAlbBaCZMFQgIu5+rEAKzfIbCBFPs O1EleSe56Tx8XVi47s0yB9bolWQabIx6+ED0hi6VsDiOJNgMaVaLbU1hzusO3pvv V5qLoXJnOVbyzNFmUpWUylplX8SImCdZl/U/T0KQsYihc74J1JjS6OBuBzXqNX93 w/uG5x5cXSEELWOU+WuhLzgfxCHDyT/bmRW/gTtgmvPa3xxphom1kJcmKjslp6Bi o8P/kvIdweixEM3EorOalD0ztX0q5eWNoJ/I9ObYNqgh3ls2BjyWzV5oe42/oFXE B24zmZuNHt5XAcATTGcTEjZCZCBWErdMTwZnIV7gXSh5p3kvDPSMwrqP+wFvNjyg O8Ifd1fqnIXVLtFVqN/mHbUfEyZrkjVcjxSBkb5p9nB2gtfa7BMJhvyA+rxZOBte MmKpVt9DFZ17I6mmAywXVVnMePut6bJ8Fqq6E4ewuza3aAOXB2i2nrDGcu75gn3k UEJ0ZwQCnQ== =eb46 -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-omap-5.17' into nand/next Memory controller drivers for v5.17 - OMAP GPMC 1. Add support for AM64 SoC. 2. Minor improvement: use platform_get_irq(). [miquel.raynal@bootlin.com: A first commit introduced a new omap compatible and another moved the IDs to a header which created a conflict: moving the new ID as well in the header fixed it.] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
Miquel Raynal
commit
2997e48716
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@ -23,13 +23,20 @@ properties:
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items:
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- enum:
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- ti,am3352-gpmc
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- ti,am64-gpmc
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- ti,omap2420-gpmc
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- ti,omap2430-gpmc
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- ti,omap3430-gpmc
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- ti,omap4430-gpmc
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reg:
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maxItems: 1
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minItems: 1
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maxItems: 2
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reg-names:
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items:
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- const: cfg
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- const: data
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interrupts:
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maxItems: 1
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@ -44,6 +51,9 @@ properties:
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items:
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- const: fck
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power-domains:
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maxItems: 1
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dmas:
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items:
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- description: DMA channel for GPMC NAND prefetch
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@ -133,6 +143,17 @@ required:
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- "#address-cells"
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- "#size-cells"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: ti,am64-gpmc
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then:
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required:
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- reg-names
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- power-domains
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additionalProperties: false
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examples:
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@ -237,6 +237,7 @@ struct gpmc_device {
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struct omap3_gpmc_regs context;
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int nirqs;
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unsigned int is_suspended:1;
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struct resource *data;
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};
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static struct irq_domain *gpmc_irq_domain;
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@ -1456,12 +1457,18 @@ static void gpmc_mem_exit(void)
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}
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}
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static void gpmc_mem_init(void)
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static void gpmc_mem_init(struct gpmc_device *gpmc)
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{
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int cs;
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gpmc_mem_root.start = GPMC_MEM_START;
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gpmc_mem_root.end = GPMC_MEM_END;
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if (!gpmc->data) {
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/* All legacy devices have same data IO window */
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gpmc_mem_root.start = GPMC_MEM_START;
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gpmc_mem_root.end = GPMC_MEM_END;
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} else {
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gpmc_mem_root.start = gpmc->data->start;
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gpmc_mem_root.end = gpmc->data->end;
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}
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/* Reserve all regions that has been set up by bootloader */
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for (cs = 0; cs < gpmc_cs_num; cs++) {
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@ -1888,6 +1895,7 @@ static const struct of_device_id gpmc_dt_ids[] = {
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{ .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */
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{ .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */
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{ .compatible = "ti,am3352-gpmc" }, /* am335x devices */
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{ .compatible = "ti,am64-gpmc" },
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{ }
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};
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@ -2175,7 +2183,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
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}
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}
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if (of_device_is_compatible(child, "ti,omap2-nand")) {
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if (of_match_node(omap_nand_ids, child)) {
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/* NAND specific setup */
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val = 8;
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of_property_read_u32(child, "nand-bus-width", &val);
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@ -2502,21 +2510,29 @@ static int gpmc_probe(struct platform_device *pdev)
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gpmc->dev = &pdev->dev;
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platform_set_drvdata(pdev, gpmc);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENOENT;
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gpmc_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(gpmc_base))
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return PTR_ERR(gpmc_base);
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg");
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if (!res) {
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dev_err(&pdev->dev, "Failed to get resource: irq\n");
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return -ENOENT;
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/* legacy DT */
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gpmc_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(gpmc_base))
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return PTR_ERR(gpmc_base);
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} else {
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gpmc_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(gpmc_base))
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return PTR_ERR(gpmc_base);
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "data");
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if (!res) {
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dev_err(&pdev->dev, "couldn't get data reg resource\n");
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return -ENOENT;
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}
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gpmc->data = res;
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}
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gpmc->irq = res->start;
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gpmc->irq = platform_get_irq(pdev, 0);
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if (gpmc->irq < 0)
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return gpmc->irq;
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gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck");
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if (IS_ERR(gpmc_l3_clk)) {
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@ -2562,7 +2578,7 @@ static int gpmc_probe(struct platform_device *pdev)
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dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
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GPMC_REVISION_MINOR(l));
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gpmc_mem_init();
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gpmc_mem_init(gpmc);
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rc = gpmc_gpio_init(gpmc);
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if (rc)
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goto gpio_init_failed;
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@ -42,6 +42,7 @@ config MTD_NAND_OMAP2
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tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"
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depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
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depends on HAS_IOMEM
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select OMAP_GPMC if ARCH_K3
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help
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Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4
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and Keystone platforms.
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@ -2290,11 +2290,7 @@ static int omap_nand_remove(struct platform_device *pdev)
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return ret;
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}
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static const struct of_device_id omap_nand_ids[] = {
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{ .compatible = "ti,omap2-nand", },
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{ .compatible = "ti,am64-nand", },
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{},
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};
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/* omap_nand_ids defined in linux/platform_data/mtd-nand-omap2.h */
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MODULE_DEVICE_TABLE(of, omap_nand_ids);
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static struct platform_driver omap_nand_driver = {
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@ -7,6 +7,7 @@
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#define _MTD_NAND_OMAP2_H
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#include <linux/mtd/partitions.h>
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#include <linux/mod_devicetable.h>
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#define GPMC_BCH_NUM_REMAINDER 8
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@ -61,4 +62,11 @@ struct gpmc_nand_regs {
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void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
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};
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#endif
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static const struct of_device_id omap_nand_ids[] = {
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{ .compatible = "ti,omap2-nand", },
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{ .compatible = "ti,am64-nand", },
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{},
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};
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#endif /* _MTD_NAND_OMAP2_H */
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