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drm/amd/powerplay: Tidy up vega10_thermal_initialize() 

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis 2017-09-08 09:45:34 -04:00 committed by Alex Deucher
parent 23db59e48a
commit 298e87c95f
1 changed files with 5 additions and 8 deletions
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13
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c
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@ -429,19 +429,16 @@ static int vega10_thermal_initialize(struct pp_hwmgr *hwmgr)
reg = soc15_get_register_offset(THM_HWID, 0, reg = soc15_get_register_offset(THM_HWID, 0,
mmCG_TACH_CTRL_BASE_IDX, mmCG_TACH_CTRL); mmCG_TACH_CTRL_BASE_IDX, mmCG_TACH_CTRL);
cgs_write_register(hwmgr->device, reg, cgs_write_register(hwmgr->device, reg,
(cgs_read_register(hwmgr->device, reg) & CGS_REG_SET_FIELD(cgs_read_register(hwmgr->device, reg),
~CG_TACH_CTRL__EDGE_PER_REV_MASK) | CG_TACH_CTRL, EDGE_PER_REV,
((hwmgr->thermal_controller.fanInfo. hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution - 1));
ucTachometerPulsesPerRevolution - 1) <<
CG_TACH_CTRL__EDGE_PER_REV__SHIFT));
} }
reg = soc15_get_register_offset(THM_HWID, 0, reg = soc15_get_register_offset(THM_HWID, 0,
mmCG_FDO_CTRL2_BASE_IDX, mmCG_FDO_CTRL2); mmCG_FDO_CTRL2_BASE_IDX, mmCG_FDO_CTRL2);
cgs_write_register(hwmgr->device, reg, cgs_write_register(hwmgr->device, reg,
(cgs_read_register(hwmgr->device, reg) & CGS_REG_SET_FIELD(cgs_read_register(hwmgr->device, reg),
~CG_FDO_CTRL2__TACH_PWM_RESP_RATE_MASK) | CG_FDO_CTRL2, TACH_PWM_RESP_RATE, 0x28));
(0x28 << CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT));
return 0; return 0;
} }