mfd: intel-m10-bmc: Expose MAC address and count
Create two sysfs entries for exposing the MAC address and count from the MAX10 BMC register space. The MAC address is the first in a sequential block of MAC addresses reserved for the FPGA card. The MAC count is the number of MAC addresses in the reserved block. Signed-off-by: Russ Weight <russell.h.weight@intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -13,3 +13,24 @@ Contact: Xu Yilun <yilun.xu@intel.com>
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Description: Read only. Returns the firmware version of Intel MAX10
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BMC chip.
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Format: "0x%x".
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What: /sys/bus/spi/devices/.../mac_address
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Date: January 2021
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KernelVersion: 5.12
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Contact: Russ Weight <russell.h.weight@intel.com>
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Description: Read only. Returns the first MAC address in a block
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of sequential MAC addresses assigned to the board
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that is managed by the Intel MAX10 BMC. It is stored in
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FLASH storage and is mirrored in the MAX10 BMC register
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space.
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Format: "%02x:%02x:%02x:%02x:%02x:%02x".
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What: /sys/bus/spi/devices/.../mac_count
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Date: January 2021
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KernelVersion: 5.12
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Contact: Russ Weight <russell.h.weight@intel.com>
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Description: Read only. Returns the number of sequential MAC
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addresses assigned to the board managed by the Intel
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MAX10 BMC. This value is stored in FLASH and is mirrored
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in the MAX10 BMC register space.
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Format: "%u".
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@ -60,9 +60,52 @@ static ssize_t bmcfw_version_show(struct device *dev,
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}
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static DEVICE_ATTR_RO(bmcfw_version);
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static ssize_t mac_address_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct intel_m10bmc *max10 = dev_get_drvdata(dev);
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unsigned int macaddr_low, macaddr_high;
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int ret;
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ret = m10bmc_sys_read(max10, M10BMC_MAC_LOW, &macaddr_low);
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if (ret)
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return ret;
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ret = m10bmc_sys_read(max10, M10BMC_MAC_HIGH, &macaddr_high);
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if (ret)
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return ret;
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return sysfs_emit(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
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(u8)FIELD_GET(M10BMC_MAC_BYTE1, macaddr_low),
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(u8)FIELD_GET(M10BMC_MAC_BYTE2, macaddr_low),
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(u8)FIELD_GET(M10BMC_MAC_BYTE3, macaddr_low),
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(u8)FIELD_GET(M10BMC_MAC_BYTE4, macaddr_low),
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(u8)FIELD_GET(M10BMC_MAC_BYTE5, macaddr_high),
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(u8)FIELD_GET(M10BMC_MAC_BYTE6, macaddr_high));
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}
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static DEVICE_ATTR_RO(mac_address);
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static ssize_t mac_count_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct intel_m10bmc *max10 = dev_get_drvdata(dev);
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unsigned int macaddr_high;
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int ret;
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ret = m10bmc_sys_read(max10, M10BMC_MAC_HIGH, &macaddr_high);
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if (ret)
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return ret;
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return sysfs_emit(buf, "%u\n",
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(u8)FIELD_GET(M10BMC_MAC_COUNT, macaddr_high));
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}
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static DEVICE_ATTR_RO(mac_count);
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static struct attribute *m10bmc_attrs[] = {
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&dev_attr_bmc_version.attr,
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&dev_attr_bmcfw_version.attr,
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&dev_attr_mac_address.attr,
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&dev_attr_mac_count.attr,
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NULL,
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};
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ATTRIBUTE_GROUPS(m10bmc);
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@ -15,6 +15,15 @@
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/* Register offset of system registers */
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#define NIOS2_FW_VERSION 0x0
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#define M10BMC_MAC_LOW 0x10
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#define M10BMC_MAC_BYTE4 GENMASK(7, 0)
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#define M10BMC_MAC_BYTE3 GENMASK(15, 8)
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#define M10BMC_MAC_BYTE2 GENMASK(23, 16)
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#define M10BMC_MAC_BYTE1 GENMASK(31, 24)
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#define M10BMC_MAC_HIGH 0x14
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#define M10BMC_MAC_BYTE6 GENMASK(7, 0)
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#define M10BMC_MAC_BYTE5 GENMASK(15, 8)
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#define M10BMC_MAC_COUNT GENMASK(23, 16)
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#define M10BMC_TEST_REG 0x3c
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#define M10BMC_BUILD_VER 0x68
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#define M10BMC_VER_MAJOR_MSK GENMASK(23, 16)
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