clk: mvebu: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag. Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -137,8 +137,8 @@ void __init mvebu_coreclk_setup(struct device_node *np,
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of_property_read_string_index(np, "clock-output-names", 0,
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&tclk_name);
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rate = desc->get_tclk_freq(base);
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clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL,
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CLK_IS_ROOT, rate);
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clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL, 0,
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rate);
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WARN_ON(IS_ERR(clk_data.clks[0]));
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/* Register CPU clock */
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@ -150,8 +150,8 @@ void __init mvebu_coreclk_setup(struct device_node *np,
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&& desc->is_sscg_enabled(base))
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rate = desc->fix_sscg_deviation(rate);
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clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL,
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CLK_IS_ROOT, rate);
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clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL, 0,
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rate);
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WARN_ON(IS_ERR(clk_data.clks[1]));
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/* Register fixed-factor clocks derived from CPU clock */
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@ -174,8 +174,7 @@ void __init mvebu_coreclk_setup(struct device_node *np,
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2 + desc->num_ratios, &name);
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rate = desc->get_refclk_freq(base);
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clk_data.clks[2 + desc->num_ratios] =
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clk_register_fixed_rate(NULL, name, NULL,
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CLK_IS_ROOT, rate);
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clk_register_fixed_rate(NULL, name, NULL, 0, rate);
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WARN_ON(IS_ERR(clk_data.clks[2 + desc->num_ratios]));
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}
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@ -225,8 +225,7 @@ static int dove_divider_init(struct device *dev, void __iomem *base,
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* Create the core PLL clock. We treat this as a fixed rate
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* clock as we don't know any better, and documentation is sparse.
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*/
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clk = clk_register_fixed_rate(dev, core_pll[0], NULL, CLK_IS_ROOT,
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2000000000UL);
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clk = clk_register_fixed_rate(dev, core_pll[0], NULL, 0, 2000000000UL);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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