crypto: arm64/aes-blk - expose AES-CTR as synchronous cipher as well
In addition to wrapping the AES-CTR cipher into the async SIMD wrapper, which exposes it as an async skcipher that defers processing to process context, expose our AES-CTR implementation directly as a synchronous cipher as well, but with a lower priority. This makes the AES-CTR transform usable in places where synchronous transforms are required, such as the MAC802.11 encryption code, which executes in sotfirq context, where SIMD processing is allowed on arm64. Users of the async transform will keep the existing behavior. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -325,6 +325,23 @@ static struct skcipher_alg aes_algs[] = { {
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.setkey = skcipher_aes_setkey,
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.setkey = skcipher_aes_setkey,
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.encrypt = ctr_encrypt,
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.encrypt = ctr_encrypt,
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.decrypt = ctr_encrypt,
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.decrypt = ctr_encrypt,
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}, {
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.base = {
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.cra_name = "ctr(aes)",
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.cra_driver_name = "ctr-aes-" MODE,
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.cra_priority = PRIO - 1,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct crypto_aes_ctx),
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.cra_alignmask = 7,
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.cra_module = THIS_MODULE,
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},
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.chunksize = AES_BLOCK_SIZE,
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.setkey = skcipher_aes_setkey,
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.encrypt = ctr_encrypt,
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.decrypt = ctr_encrypt,
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}, {
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}, {
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.base = {
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.base = {
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.cra_name = "__xts(aes)",
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.cra_name = "__xts(aes)",
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@ -350,8 +367,9 @@ static void aes_exit(void)
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{
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{
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int i;
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int i;
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for (i = 0; i < ARRAY_SIZE(aes_simd_algs) && aes_simd_algs[i]; i++)
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for (i = 0; i < ARRAY_SIZE(aes_simd_algs); i++)
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simd_skcipher_free(aes_simd_algs[i]);
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if (aes_simd_algs[i])
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simd_skcipher_free(aes_simd_algs[i]);
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crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs));
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crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs));
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}
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}
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@ -370,6 +388,9 @@ static int __init aes_init(void)
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return err;
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return err;
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for (i = 0; i < ARRAY_SIZE(aes_algs); i++) {
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for (i = 0; i < ARRAY_SIZE(aes_algs); i++) {
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if (!(aes_algs[i].base.cra_flags & CRYPTO_ALG_INTERNAL))
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continue;
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algname = aes_algs[i].base.cra_name + 2;
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algname = aes_algs[i].base.cra_name + 2;
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drvname = aes_algs[i].base.cra_driver_name + 2;
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drvname = aes_algs[i].base.cra_driver_name + 2;
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basename = aes_algs[i].base.cra_driver_name;
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basename = aes_algs[i].base.cra_driver_name;
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