dmaengine/amba-pl08x: Schedule tasklet in case of error interrupt
Currently, if error interrupt occurs, nothing is done in interrupt handler (just clearing the interrupts). We must somehow indicate this to the user that DMA is over, due to ERR interrupt or TC interrupt. So, this patch just schedules existing tasklet, with a print showing error interrupt has occurred on which channels. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -1619,38 +1619,40 @@ static void pl08x_tasklet(unsigned long data)
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static irqreturn_t pl08x_irq(int irq, void *dev)
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{
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struct pl08x_driver_data *pl08x = dev;
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u32 mask = 0;
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u32 val;
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int i;
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u32 mask = 0, err, tc, i;
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val = readl(pl08x->base + PL080_ERR_STATUS);
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if (val) {
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/* An error interrupt (on one or more channels) */
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dev_err(&pl08x->adev->dev,
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"%s error interrupt, register value 0x%08x\n",
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__func__, val);
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/*
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* Simply clear ALL PL08X error interrupts,
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* regardless of channel and cause
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* FIXME: should be 0x00000003 on PL081 really.
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*/
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writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR);
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/* check & clear - ERR & TC interrupts */
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err = readl(pl08x->base + PL080_ERR_STATUS);
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if (err) {
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dev_err(&pl08x->adev->dev, "%s error interrupt, register value 0x%08x\n",
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__func__, err);
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writel(err, pl08x->base + PL080_ERR_CLEAR);
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}
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val = readl(pl08x->base + PL080_INT_STATUS);
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tc = readl(pl08x->base + PL080_INT_STATUS);
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if (tc)
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writel(tc, pl08x->base + PL080_TC_CLEAR);
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if (!err && !tc)
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return IRQ_NONE;
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for (i = 0; i < pl08x->vd->channels; i++) {
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if ((1 << i) & val) {
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if (((1 << i) & err) || ((1 << i) & tc)) {
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/* Locate physical channel */
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struct pl08x_phy_chan *phychan = &pl08x->phy_chans[i];
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struct pl08x_dma_chan *plchan = phychan->serving;
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if (!plchan) {
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dev_err(&pl08x->adev->dev,
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"%s Error TC interrupt on unused channel: 0x%08x\n",
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__func__, i);
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continue;
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}
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/* Schedule tasklet on this channel */
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tasklet_schedule(&plchan->tasklet);
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mask |= (1 << i);
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}
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}
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/* Clear only the terminal interrupts on channels we processed */
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writel(mask, pl08x->base + PL080_TC_CLEAR);
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return mask ? IRQ_HANDLED : IRQ_NONE;
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}
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