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drivers/rtc/rtc-stmp3xxx.c: provide timeout for potentially endless loop polling a HW bit 

It's always a bad idea to poll on HW bits without a timeout.

The i.MX28 RTC can be easily brought into a state in which the RTC is
not running (until after a power-on-reset) and thus the status bits
which are polled in the driver won't ever change.

This patch prevents the kernel from getting stuck in this case.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Lothar Waßmann 2013-08-13 16:00:56 -07:00 committed by Linus Torvalds
parent b610ded719
commit 28a0c88312
1 changed files with 25 additions and 10 deletions
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35
drivers/rtc/rtc-stmp3xxx.c
View File

@ -23,6 +23,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/rtc.h>
#include <linux/slab.h>
#include <linux/of_device.h>
@ -119,24 +120,39 @@ static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
}
#endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */
static void stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
static int stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
{
int timeout = 5000; /* 3ms according to i.MX28 Ref Manual */
/*
* The datasheet doesn't say which way round the
* NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0,
* 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS
* The i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
* states:
* | The order in which registers are updated is
* | Persistent 0, 1, 2, 3, 4, 5, Alarm, Seconds.
* | (This list is in bitfield order, from LSB to MSB, as they would
* | appear in the STALE_REGS and NEW_REGS bitfields of the HW_RTC_STAT
* | register. For example, the Seconds register corresponds to
* | STALE_REGS or NEW_REGS containing 0x80.)
*/
while (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT))
cpu_relax();
do {
if (!(readl(rtc_data->io + STMP3XXX_RTC_STAT) &
(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)))
return 0;
udelay(1);
} while (--timeout > 0);
return (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)) ? -ETIME : 0;
}
/* Time read/write */
static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
{
int ret;
struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
stmp3xxx_wait_time(rtc_data);
ret = stmp3xxx_wait_time(rtc_data);
if (ret)
return ret;
rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
return 0;
}
@ -146,8 +162,7 @@ static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t)
struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS);
stmp3xxx_wait_time(rtc_data);
return 0;
return stmp3xxx_wait_time(rtc_data);
}
/* interrupt(s) handler */