i2c: mlxcpld: Add capability register description to documentation
It adds capability register description to documentation. Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -20,6 +20,10 @@ The next transaction types are supported:
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- Write Byte/Block.
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- Write Byte/Block.
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Registers:
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Registers:
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CPBLTY 0x0 - capability reg.
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Bits [6:5] - transaction length. b01 - 72B is supported,
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36B in other case.
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Bit 7 - SMBus block read support.
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CTRL 0x1 - control reg.
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CTRL 0x1 - control reg.
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Resets all the registers.
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Resets all the registers.
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HALF_CYC 0x4 - cycle reg.
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HALF_CYC 0x4 - cycle reg.
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