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cpufreq: imx6q: read OCOTP through nvmem for imx6ul/imx6ull 

On i.MX6UL/i.MX6ULL, accessing OCOTP directly is wrong because
the ocotp clock needs to be enabled first. Add support for reading
OCOTP through the nvmem API, and keep the old method there to
support old dtb.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Anson Huang 2018-10-08 14:07:34 +08:00 committed by Rafael J. Wysocki
parent 9d21d33cab
commit 2733fb0d06
1 changed files with 35 additions and 17 deletions
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52
drivers/cpufreq/imx6q-cpufreq.c
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@ -12,6 +12,7 @@
#include <linux/cpu_cooling.h> #include <linux/cpu_cooling.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/nvmem-consumer.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/pm_opp.h> #include <linux/pm_opp.h>
@ -290,20 +291,32 @@ put_node:
#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2 #define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3 #define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
static void imx6ul_opp_check_speed_grading(struct device *dev) static int imx6ul_opp_check_speed_grading(struct device *dev)
{ {
struct device_node *np;
void __iomem *base;
u32 val; u32 val;
int ret = 0;
np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp"); if (of_find_property(dev->of_node, "nvmem-cells", NULL)) {
if (!np) ret = nvmem_cell_read_u32(dev, "speed_grade", &val);
return; if (ret)
return ret;
} else {
struct device_node *np;
void __iomem *base;
base = of_iomap(np, 0); np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp");
if (!base) { if (!np)
dev_err(dev, "failed to map ocotp\n"); return -ENOENT;
goto put_node;
base = of_iomap(np, 0);
of_node_put(np);
if (!base) {
dev_err(dev, "failed to map ocotp\n");
return -EFAULT;
}
val = readl_relaxed(base + OCOTP_CFG3);
iounmap(base);
} }
/* /*
@ -314,7 +327,6 @@ static void imx6ul_opp_check_speed_grading(struct device *dev)
* 2b'11: 900000000Hz on i.MX6ULL only; * 2b'11: 900000000Hz on i.MX6ULL only;
* We need to set the max speed of ARM according to fuse map. * We need to set the max speed of ARM according to fuse map.
*/ */
val = readl_relaxed(base + OCOTP_CFG3);
val >>= OCOTP_CFG3_SPEED_SHIFT; val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3; val &= 0x3;
@ -334,9 +346,7 @@ static void imx6ul_opp_check_speed_grading(struct device *dev)
dev_warn(dev, "failed to disable 900MHz OPP\n"); dev_warn(dev, "failed to disable 900MHz OPP\n");
} }
iounmap(base); return ret;
put_node:
of_node_put(np);
} }
static int imx6q_cpufreq_probe(struct platform_device *pdev) static int imx6q_cpufreq_probe(struct platform_device *pdev)
@ -394,10 +404,18 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
} }
if (of_machine_is_compatible("fsl,imx6ul") || if (of_machine_is_compatible("fsl,imx6ul") ||
of_machine_is_compatible("fsl,imx6ull")) of_machine_is_compatible("fsl,imx6ull")) {
imx6ul_opp_check_speed_grading(cpu_dev); ret = imx6ul_opp_check_speed_grading(cpu_dev);
else if (ret == -EPROBE_DEFER)
return ret;
if (ret) {
dev_err(cpu_dev, "failed to read ocotp: %d\n",
ret);
return ret;
}
} else {
imx6q_opp_check_speed_grading(cpu_dev); imx6q_opp_check_speed_grading(cpu_dev);
}
/* Because we have added the OPPs here, we must free them */ /* Because we have added the OPPs here, we must free them */
free_opp = true; free_opp = true;