powerpc/64s/radix: Fix preempt imbalance in TLB flush
Fixes: 424de9c6e3
("powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -360,12 +360,14 @@ void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr)
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pid = mm ? mm->context.id : 0;
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preempt_disable();
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if (unlikely(pid == MMU_NO_CONTEXT))
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goto no_context;
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/* 4k page size, just blow the world */
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if (PAGE_SIZE == 0x1000) {
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radix__flush_all_mm(mm);
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preempt_enable();
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return;
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}
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