ARM: 6330/1: perf: reword comments relating to perf_event_do_pending
This is purely a cosmetic change to the ARM perf backend because the current comments about the relationship between NMIs, interrupt context and perf_event_do_pending are misleading. This patch updates the comments so that they reflect what the code actually does (which is in line with other architectures). Acked-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -17,7 +17,7 @@
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* counter interrupts are regular interrupts and not an NMI. This
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* means that when we receive the interrupt we can call
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* perf_event_do_pending() that handles all of the work with
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* interrupts enabled.
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* interrupts disabled.
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*/
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static inline void
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set_perf_event_pending(void)
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@ -1041,8 +1041,8 @@ armv6pmu_handle_irq(int irq_num,
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/*
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* Handle the pending perf events.
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*
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* Note: this call *must* be run with interrupts enabled. For
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* platforms that can have the PMU interrupts raised as a PMI, this
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* Note: this call *must* be run with interrupts disabled. For
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* platforms that can have the PMU interrupts raised as an NMI, this
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* will not work.
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*/
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perf_event_do_pending();
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@ -2017,8 +2017,8 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
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/*
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* Handle the pending perf events.
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*
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* Note: this call *must* be run with interrupts enabled. For
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* platforms that can have the PMU interrupts raised as a PMI, this
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* Note: this call *must* be run with interrupts disabled. For
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* platforms that can have the PMU interrupts raised as an NMI, this
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* will not work.
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*/
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perf_event_do_pending();
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