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drm/i915: Add support for fence registers on Ivybridge. 

The registers are the same as on Sandybridge.  Fixes scrambled display
in X when it does software drawing to the GTT, and scans the results
out as tiled.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
This commit is contained in:
Eric Anholt 2011-05-06 13:55:53 -07:00 committed by Keith Packard
parent 10ed13e4a5
commit 25aebfc30b
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/drm/i915/i915_gem.c
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@ -2673,6 +2673,7 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
update: update:
obj->tiling_changed = false; obj->tiling_changed = false;
switch (INTEL_INFO(dev)->gen) { switch (INTEL_INFO(dev)->gen) {
case 7:
case 6: case 6:
ret = sandybridge_write_fence_reg(obj, pipelined); ret = sandybridge_write_fence_reg(obj, pipelined);
break; break;
@ -2706,6 +2707,7 @@ i915_gem_clear_fence_reg(struct drm_device *dev,
uint32_t fence_reg = reg - dev_priv->fence_regs; uint32_t fence_reg = reg - dev_priv->fence_regs;
switch (INTEL_INFO(dev)->gen) { switch (INTEL_INFO(dev)->gen) {
case 7:
case 6: case 6:
I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + fence_reg*8, 0); I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + fence_reg*8, 0);
break; break;