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firmware: xilinx: add support for sd/gem config 

Add new APIs in firmware to configure SD/GEM registers. Internally
it calls PM IOCTL for below SD/GEM register configuration:
- SD/EMMC select
- SD slot type
- SD base clock
- SD 8 bit support
- SD fixed config
- GEM SGMII Mode
- GEM fixed config

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Ronak Jain 2022-09-14 18:03:15 +05:30 committed by Jakub Kicinski
parent 53ff251709
commit 256dea9134
2 changed files with 76 additions and 0 deletions
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31
drivers/firmware/xilinx/zynqmp.c
View File

@ -1311,6 +1311,37 @@ int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
id, 0, payload);
}
/**
* zynqmp_pm_set_sd_config - PM call to set value of SD config registers
* @node: SD node ID
* @config: The config type of SD registers
* @value: Value to be set
*
* Return: Returns 0 on success or error value on failure.
*/
int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
config, value, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
/**
* zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
* @node: GEM node ID
* @config: The config type of GEM registers
* @value: Value to be set
*
* Return: Returns 0 on success or error value on failure.
*/
int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
config, value, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
/**
* struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
* @subtype: Shutdown subtype

45
include/linux/firmware/xlnx-zynqmp.h
View File

@ -153,6 +153,9 @@ enum pm_ioctl_id {
/* Runtime feature configuration */
IOCTL_SET_FEATURE_CONFIG = 26,
IOCTL_GET_FEATURE_CONFIG = 27,
/* Dynamic SD/GEM configuration */
IOCTL_SET_SD_CONFIG = 30,
IOCTL_SET_GEM_CONFIG = 31,
};
enum pm_query_id {
@ -399,6 +402,30 @@ enum pm_feature_config_id {
PM_FEATURE_EXTWDT_VALUE = 4,
};
/**
* enum pm_sd_config_type - PM SD configuration.
* @SD_CONFIG_EMMC_SEL: To set SD_EMMC_SEL in CTRL_REG_SD and SD_SLOTTYPE
* @SD_CONFIG_BASECLK: To set SD_BASECLK in SD_CONFIG_REG1
* @SD_CONFIG_8BIT: To set SD_8BIT in SD_CONFIG_REG2
* @SD_CONFIG_FIXED: To set fixed config registers
*/
enum pm_sd_config_type {
SD_CONFIG_EMMC_SEL = 1,
SD_CONFIG_BASECLK = 2,
SD_CONFIG_8BIT = 3,
SD_CONFIG_FIXED = 4,
};
/**
* enum pm_gem_config_type - PM GEM configuration.
* @GEM_CONFIG_SGMII_MODE: To set GEM_SGMII_MODE in GEM_CLK_CTRL register
* @GEM_CONFIG_FIXED: To set fixed config registers
*/
enum pm_gem_config_type {
GEM_CONFIG_SGMII_MODE = 1,
GEM_CONFIG_FIXED = 2,
};
/**
* struct zynqmp_pm_query_data - PM query data
* @qid: query ID
@ -475,6 +502,9 @@ int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id);
int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value);
int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, u32 *payload);
int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset);
int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value);
int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
u32 value);
#else
static inline int zynqmp_pm_get_api_version(u32 *version)
{
@ -745,6 +775,21 @@ static inline int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
{
return -ENODEV;
}
static inline int zynqmp_pm_set_sd_config(u32 node,
enum pm_sd_config_type config,
u32 value)
{
return -ENODEV;
}
static inline int zynqmp_pm_set_gem_config(u32 node,
enum pm_gem_config_type config,
u32 value)
{
return -ENODEV;
}
#endif
#endif /* __FIRMWARE_ZYNQMP_H__ */