[media] tc358743: support probe from device tree
Add support for probing the TC358743 subdevice from device tree. The reference clock must be supplied using the common clock bindings. MIPI CSI-2 specific properties are parsed from the OF graph endpoint node and support for a non-continuous MIPI CSI-2 clock is added. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Philipp Zabel
Mauro Carvalho Chehab
parent
8ec23da735
commit
2561482468
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@ -0,0 +1,48 @@
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* Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
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The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
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a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
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Required Properties:
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- compatible: value should be "toshiba,tc358743"
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- clocks, clock-names: should contain a phandle link to the reference clock
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source, the clock input is named "refclk".
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Optional Properties:
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- reset-gpios: gpio phandle GPIO connected to the reset pin
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- interrupts, interrupt-parent: GPIO connected to the interrupt pin
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- data-lanes: should be <1 2 3 4> for four-lane operation,
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or <1 2> for two-lane operation
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- clock-lanes: should be <0>
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- clock-noncontinuous: Presence of this boolean property decides whether the
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MIPI CSI-2 clock is continuous or non-continuous.
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- link-frequencies: List of allowed link frequencies in Hz. Each frequency is
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expressed as a 64-bit big-endian integer. The frequency
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is half of the bps per lane due to DDR transmission.
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For further information on the MIPI CSI-2 endpoint node properties, see
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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Example:
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tc358743@0f {
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compatible = "toshiba,tc358743";
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reg = <0x0f>;
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clocks = <&hdmi_osc>;
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clock-names = "refclk";
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reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio2>;
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interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
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port {
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tc358743_out: endpoint {
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remote-endpoint = <&mipi_csi2_in>;
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data-lanes = <1 2 3 4>;
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clock-lanes = <0>;
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clock-noncontinuous;
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link-frequencies = /bits/ 64 <297000000>;
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};
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};
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};
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@ -29,7 +29,9 @@
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/i2c.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/videodev2.h>
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#include <linux/workqueue.h>
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#include <linux/v4l2-dv-timings.h>
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@ -37,6 +39,7 @@
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#include <media/v4l2-dv-timings.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-of.h>
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#include <media/tc358743.h>
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#include "tc358743_regs.h"
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@ -69,6 +72,7 @@ static const struct v4l2_dv_timings_cap tc358743_timings_cap = {
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struct tc358743_state {
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struct tc358743_platform_data pdata;
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struct v4l2_of_bus_mipi_csi2 bus;
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struct v4l2_subdev sd;
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struct media_pad pad;
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struct v4l2_ctrl_handler hdl;
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@ -90,6 +94,8 @@ struct tc358743_state {
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struct v4l2_dv_timings timings;
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u32 mbus_fmt_code;
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struct gpio_desc *reset_gpio;
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};
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static void tc358743_enable_interrupts(struct v4l2_subdev *sd,
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@ -700,7 +706,8 @@ static void tc358743_set_csi(struct v4l2_subdev *sd)
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((lanes > 2) ? MASK_D2M_HSTXVREGEN : 0x0) |
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((lanes > 3) ? MASK_D3M_HSTXVREGEN : 0x0));
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i2c_wr32(sd, TXOPTIONCNTRL, MASK_CONTCLKMODE);
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i2c_wr32(sd, TXOPTIONCNTRL, (state->bus.flags &
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V4L2_MBUS_CSI2_CONTINUOUS_CLOCK) ? MASK_CONTCLKMODE : 0);
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i2c_wr32(sd, STARTCNTRL, MASK_START);
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i2c_wr32(sd, CSI_START, MASK_STRT);
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@ -1638,6 +1645,136 @@ static const struct v4l2_ctrl_config tc358743_ctrl_audio_present = {
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/* --------------- PROBE / REMOVE --------------- */
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#ifdef CONFIG_OF
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static void tc358743_gpio_reset(struct tc358743_state *state)
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{
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gpiod_set_value(state->reset_gpio, 0);
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usleep_range(5000, 10000);
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gpiod_set_value(state->reset_gpio, 1);
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usleep_range(1000, 2000);
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gpiod_set_value(state->reset_gpio, 0);
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msleep(20);
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}
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static int tc358743_probe_of(struct tc358743_state *state)
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{
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struct device *dev = &state->i2c_client->dev;
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struct v4l2_of_endpoint *endpoint;
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struct device_node *ep;
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struct clk *refclk;
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u32 bps_pr_lane;
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int ret = -EINVAL;
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refclk = devm_clk_get(dev, "refclk");
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if (IS_ERR(refclk)) {
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if (PTR_ERR(refclk) != -EPROBE_DEFER)
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dev_err(dev, "failed to get refclk: %ld\n",
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PTR_ERR(refclk));
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return PTR_ERR(refclk);
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}
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ep = of_graph_get_next_endpoint(dev->of_node, NULL);
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if (!ep) {
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dev_err(dev, "missing endpoint node\n");
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return -EINVAL;
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}
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endpoint = v4l2_of_alloc_parse_endpoint(ep);
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if (IS_ERR(endpoint)) {
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dev_err(dev, "failed to parse endpoint\n");
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return PTR_ERR(endpoint);
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}
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if (endpoint->bus_type != V4L2_MBUS_CSI2 ||
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endpoint->bus.mipi_csi2.num_data_lanes == 0 ||
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endpoint->nr_of_link_frequencies == 0) {
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dev_err(dev, "missing CSI-2 properties in endpoint\n");
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goto free_endpoint;
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}
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state->bus = endpoint->bus.mipi_csi2;
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clk_prepare_enable(refclk);
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state->pdata.refclk_hz = clk_get_rate(refclk);
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state->pdata.ddc5v_delay = DDC5V_DELAY_100_MS;
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state->pdata.enable_hdcp = false;
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/* A FIFO level of 16 should be enough for 2-lane 720p60 at 594 MHz. */
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state->pdata.fifo_level = 16;
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/*
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* The PLL input clock is obtained by dividing refclk by pll_prd.
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* It must be between 6 MHz and 40 MHz, lower frequency is better.
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*/
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switch (state->pdata.refclk_hz) {
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case 26000000:
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case 27000000:
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case 42000000:
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state->pdata.pll_prd = state->pdata.refclk_hz / 6000000;
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break;
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default:
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dev_err(dev, "unsupported refclk rate: %u Hz\n",
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state->pdata.refclk_hz);
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goto disable_clk;
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}
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/*
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* The CSI bps per lane must be between 62.5 Mbps and 1 Gbps.
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* The default is 594 Mbps for 4-lane 1080p60 or 2-lane 720p60.
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*/
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bps_pr_lane = 2 * endpoint->link_frequencies[0];
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if (bps_pr_lane < 62500000U || bps_pr_lane > 1000000000U) {
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dev_err(dev, "unsupported bps per lane: %u bps\n", bps_pr_lane);
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goto disable_clk;
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}
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/* The CSI speed per lane is refclk / pll_prd * pll_fbd */
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state->pdata.pll_fbd = bps_pr_lane /
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state->pdata.refclk_hz * state->pdata.pll_prd;
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/*
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* FIXME: These timings are from REF_02 for 594 Mbps per lane (297 MHz
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* link frequency). In principle it should be possible to calculate
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* them based on link frequency and resolution.
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*/
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if (bps_pr_lane != 594000000U)
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dev_warn(dev, "untested bps per lane: %u bps\n", bps_pr_lane);
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state->pdata.lineinitcnt = 0xe80;
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state->pdata.lptxtimecnt = 0x003;
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/* tclk-preparecnt: 3, tclk-zerocnt: 20 */
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state->pdata.tclk_headercnt = 0x1403;
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state->pdata.tclk_trailcnt = 0x00;
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/* ths-preparecnt: 3, ths-zerocnt: 1 */
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state->pdata.ths_headercnt = 0x0103;
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state->pdata.twakeup = 0x4882;
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state->pdata.tclk_postcnt = 0x008;
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state->pdata.ths_trailcnt = 0x2;
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state->pdata.hstxvregcnt = 0;
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state->reset_gpio = devm_gpiod_get(dev, "reset");
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if (IS_ERR(state->reset_gpio)) {
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dev_err(dev, "failed to get reset gpio\n");
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ret = PTR_ERR(state->reset_gpio);
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goto disable_clk;
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}
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tc358743_gpio_reset(state);
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ret = 0;
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goto free_endpoint;
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disable_clk:
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clk_disable_unprepare(refclk);
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free_endpoint:
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v4l2_of_free_endpoint(endpoint);
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return ret;
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}
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#else
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static inline int tc358743_probe_of(struct tc358743_state *state)
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{
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return -ENODEV;
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}
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#endif
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static int tc358743_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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@ -1658,14 +1795,20 @@ static int tc358743_probe(struct i2c_client *client,
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if (!state)
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return -ENOMEM;
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/* platform data */
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if (!pdata) {
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v4l_err(client, "No platform data!\n");
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return -ENODEV;
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}
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state->pdata = *pdata;
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state->i2c_client = client;
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/* platform data */
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if (pdata) {
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state->pdata = *pdata;
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state->bus.flags = V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
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} else {
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err = tc358743_probe_of(state);
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if (err == -ENODEV)
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v4l_err(client, "No platform data!\n");
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if (err)
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return err;
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}
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sd = &state->sd;
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v4l2_i2c_subdev_init(sd, client, &tc358743_ops);
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sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
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