ARM: at91: pm: Add sama5d2 backup mode
The sama5d2 has a mode were it is possible to cut power to the SoC while keeping the RAM in self refresh. Resuming from that mode needs support in the firmware/bootloader. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
This commit is contained in:
Alexandre Belloni
parent
2ea659a9ef
commit
24a0f5c539
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@ -15,10 +15,12 @@
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extern void __init at91rm9200_pm_init(void);
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extern void __init at91sam9_pm_init(void);
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extern void __init sama5_pm_init(void);
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extern void __init sama5d2_pm_init(void);
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#else
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static inline void __init at91rm9200_pm_init(void) { }
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static inline void __init at91sam9_pm_init(void) { }
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static inline void __init sama5_pm_init(void) { }
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static inline void __init sama5d2_pm_init(void) { }
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#endif
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#endif /* _AT91_GENERIC_H */
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@ -22,6 +22,7 @@
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#include <asm/cacheflush.h>
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#include <asm/fncpy.h>
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#include <asm/system_misc.h>
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#include <asm/suspend.h>
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#include "generic.h"
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#include "pm.h"
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@ -58,6 +59,14 @@ static int at91_pm_valid_state(suspend_state_t state)
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}
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}
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static int canary = 0xA5A5A5A5;
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static struct at91_pm_bu {
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int suspended;
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unsigned long reserved;
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phys_addr_t canary;
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phys_addr_t resume;
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} *pm_bu;
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static suspend_state_t target_state;
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@ -123,15 +132,39 @@ static void (*at91_suspend_sram_fn)(struct at91_pm_data *);
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extern void at91_pm_suspend_in_sram(struct at91_pm_data *pm_data);
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extern u32 at91_pm_suspend_in_sram_sz;
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static void at91_pm_suspend(suspend_state_t state)
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static int at91_suspend_finish(unsigned long val)
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{
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pm_data.mode = (state == PM_SUSPEND_MEM) ? AT91_PM_SLOW_CLOCK : 0;
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flush_cache_all();
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outer_disable();
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at91_suspend_sram_fn(&pm_data);
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return 0;
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}
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static void at91_pm_suspend(suspend_state_t state)
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{
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if (pm_data.deepest_state == AT91_PM_BACKUP)
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if (state == PM_SUSPEND_MEM)
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pm_data.mode = AT91_PM_BACKUP;
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else
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pm_data.mode = AT91_PM_SLOW_CLOCK;
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else
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pm_data.mode = (state == PM_SUSPEND_MEM) ? AT91_PM_SLOW_CLOCK : 0;
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if (pm_data.mode == AT91_PM_BACKUP) {
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pm_bu->suspended = 1;
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cpu_suspend(0, at91_suspend_finish);
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/* The SRAM is lost between suspend cycles */
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at91_suspend_sram_fn = fncpy(at91_suspend_sram_fn,
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&at91_pm_suspend_in_sram,
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at91_pm_suspend_in_sram_sz);
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} else {
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at91_suspend_finish(0);
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}
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outer_resume();
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}
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@ -436,6 +469,70 @@ static void __init at91_pm_sram_init(void)
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&at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
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}
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static void __init at91_pm_backup_init(void)
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{
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struct gen_pool *sram_pool;
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struct device_node *np;
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struct platform_device *pdev = NULL;
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pm_bu = NULL;
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc");
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if (!np) {
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pr_warn("%s: failed to find shdwc!\n", __func__);
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return;
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}
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pm_data.shdwc = of_iomap(np, 0);
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of_node_put(np);
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu");
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if (!np) {
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pr_warn("%s: failed to find sfrbu!\n", __func__);
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goto sfrbu_fail;
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}
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pm_data.sfrbu = of_iomap(np, 0);
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of_node_put(np);
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pm_bu = NULL;
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");
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if (!np)
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goto securam_fail;
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pdev = of_find_device_by_node(np);
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of_node_put(np);
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if (!pdev) {
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pr_warn("%s: failed to find securam device!\n", __func__);
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goto securam_fail;
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}
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sram_pool = gen_pool_get(&pdev->dev, NULL);
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if (!sram_pool) {
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pr_warn("%s: securam pool unavailable!\n", __func__);
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goto securam_fail;
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}
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pm_bu = (void *)gen_pool_alloc(sram_pool, sizeof(struct at91_pm_bu));
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if (!pm_bu) {
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pr_warn("%s: unable to alloc securam!\n", __func__);
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goto securam_fail;
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}
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pm_bu->suspended = 0;
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pm_bu->canary = virt_to_phys(&canary);
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pm_bu->resume = virt_to_phys(cpu_resume);
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return;
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sfrbu_fail:
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iounmap(pm_data.shdwc);
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pm_data.shdwc = NULL;
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securam_fail:
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iounmap(pm_data.sfrbu);
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pm_data.sfrbu = NULL;
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}
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struct pmc_info {
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unsigned long uhp_udp_mask;
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};
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@ -510,3 +607,9 @@ void __init sama5_pm_init(void)
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at91_dt_ramc();
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at91_pm_init(NULL);
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}
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void __init sama5d2_pm_init(void)
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{
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at91_pm_backup_init();
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sama5_pm_init();
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}
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@ -22,6 +22,7 @@
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#define AT91_MEMCTRL_DDRSDR 2
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#define AT91_PM_SLOW_CLOCK 0x01
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#define AT91_PM_BACKUP 0x02
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#ifndef __ASSEMBLY__
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struct at91_pm_data {
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@ -30,6 +31,9 @@ struct at91_pm_data {
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unsigned long uhp_udp_mask;
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unsigned int memctrl;
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unsigned int mode;
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void __iomem *shdwc;
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void __iomem *sfrbu;
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unsigned int deepest_state;
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};
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#endif
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@ -9,5 +9,8 @@ int main(void)
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DEFINE(PM_DATA_RAMC1, offsetof(struct at91_pm_data, ramc[1]));
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DEFINE(PM_DATA_MEMCTRL, offsetof(struct at91_pm_data, memctrl));
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DEFINE(PM_DATA_MODE, offsetof(struct at91_pm_data, mode));
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DEFINE(PM_DATA_SHDWC, offsetof(struct at91_pm_data, shdwc));
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DEFINE(PM_DATA_SFRBU, offsetof(struct at91_pm_data, sfrbu));
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return 0;
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}
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@ -97,15 +97,61 @@ ENTRY(at91_pm_suspend_in_sram)
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str tmp1, .memtype
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ldr tmp1, [r0, #PM_DATA_MODE]
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str tmp1, .pm_mode
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/* Both ldrne below are here to preload their address in the TLB */
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ldr tmp1, [r0, #PM_DATA_SHDWC]
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str tmp1, .shdwc
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cmp tmp1, #0
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ldrne tmp2, [tmp1, #0]
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ldr tmp1, [r0, #PM_DATA_SFRBU]
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str tmp1, .sfr
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cmp tmp1, #0
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ldrne tmp2, [tmp1, #0x10]
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/* Active the self-refresh mode */
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mov r0, #SRAMC_SELF_FRESH_ACTIVE
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bl at91_sramc_self_refresh
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ldr r0, .pm_mode
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tst r0, #AT91_PM_SLOW_CLOCK
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beq skip_disable_main_clock
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cmp r0, #AT91_PM_SLOW_CLOCK
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beq slow_clock
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cmp r0, #AT91_PM_BACKUP
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beq backup_mode
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/* Wait for interrupt */
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ldr pmc, .pmc_base
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at91_cpu_idle
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b exit_suspend
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slow_clock:
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bl at91_slowck_mode
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b exit_suspend
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backup_mode:
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bl at91_backup_mode
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b exit_suspend
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exit_suspend:
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/* Exit the self-refresh mode */
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mov r0, #SRAMC_SELF_FRESH_EXIT
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bl at91_sramc_self_refresh
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/* Restore registers, and return */
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ldmfd sp!, {r4 - r12, pc}
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ENDPROC(at91_pm_suspend_in_sram)
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ENTRY(at91_backup_mode)
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/*BUMEN*/
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ldr r0, .sfr
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mov tmp1, #0x1
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str tmp1, [r0, #0x10]
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/* Shutdown */
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ldr r0, .shdwc
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mov tmp1, #0xA5000000
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add tmp1, tmp1, #0x1
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str tmp1, [r0, #0]
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ENDPROC(at91_backup_mode)
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ENTRY(at91_slowck_mode)
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ldr pmc, .pmc_base
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/* Save Master clock setting */
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@ -134,18 +180,9 @@ ENTRY(at91_pm_suspend_in_sram)
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orr tmp1, tmp1, #AT91_PMC_KEY
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str tmp1, [pmc, #AT91_CKGR_MOR]
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skip_disable_main_clock:
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ldr pmc, .pmc_base
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/* Wait for interrupt */
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at91_cpu_idle
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ldr r0, .pm_mode
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tst r0, #AT91_PM_SLOW_CLOCK
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beq skip_enable_main_clock
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ldr pmc, .pmc_base
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/* Turn on the main oscillator */
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ldr tmp1, [pmc, #AT91_CKGR_MOR]
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orr tmp1, tmp1, #AT91_PMC_MOSCEN
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@ -174,14 +211,8 @@ skip_disable_main_clock:
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wait_mckrdy
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skip_enable_main_clock:
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/* Exit the self-refresh mode */
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mov r0, #SRAMC_SELF_FRESH_EXIT
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bl at91_sramc_self_refresh
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/* Restore registers, and return */
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ldmfd sp!, {r4 - r12, pc}
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ENDPROC(at91_pm_suspend_in_sram)
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mov pc, lr
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ENDPROC(at91_slowck_mode)
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/*
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* void at91_sramc_self_refresh(unsigned int is_active)
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@ -314,6 +345,10 @@ ENDPROC(at91_sramc_self_refresh)
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.word 0
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.sramc1_base:
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.word 0
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.shdwc:
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.word 0
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.sfr:
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.word 0
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.memtype:
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.word 0
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.pm_mode:
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@ -34,7 +34,6 @@ DT_MACHINE_START(sama5_dt, "Atmel SAMA5")
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MACHINE_END
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static const char *const sama5_alt_dt_board_compat[] __initconst = {
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"atmel,sama5d2",
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"atmel,sama5d4",
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NULL
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};
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@ -45,3 +44,21 @@ DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5")
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.dt_compat = sama5_alt_dt_board_compat,
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.l2c_aux_mask = ~0UL,
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MACHINE_END
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static void __init sama5d2_init(void)
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{
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of_platform_default_populate(NULL, NULL, NULL);
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sama5d2_pm_init();
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}
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static const char *const sama5d2_compat[] __initconst = {
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"atmel,sama5d2",
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NULL
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};
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DT_MACHINE_START(sama5d2, "Atmel SAMA5")
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/* Maintainer: Atmel */
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.init_machine = sama5d2_init,
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.dt_compat = sama5d2_compat,
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.l2c_aux_mask = ~0UL,
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MACHINE_END
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