scsi: lpfc: Enlarge nvmet asynchronous receive buffer counts
Under large io load, the current sizing of asynchronous buffer counts could be exceeded, indicated by a 2885 log message: 2885 Port Status Event: port status reg 0x81800000, port smphr reg 0xc000, error 1=0x52004a01, error 2=0x0 Enlarge the async receive queue size. Allow for a configurable number of buffers to be posted to each RQ, using the new attribute lpfc_nvmet_mrq_post. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <james.smart@broadcom.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -782,6 +782,7 @@ struct lpfc_hba {
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uint32_t cfg_nvme_oas;
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uint32_t cfg_nvme_embed_cmd;
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uint32_t cfg_nvme_io_channel;
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uint32_t cfg_nvmet_mrq_post;
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uint32_t cfg_nvmet_mrq;
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uint32_t cfg_enable_nvmet;
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uint32_t cfg_nvme_enable_fb;
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@ -3423,6 +3423,15 @@ LPFC_ATTR_R(nvmet_mrq,
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LPFC_NVMET_MRQ_AUTO, LPFC_NVMET_MRQ_AUTO, LPFC_NVMET_MRQ_MAX,
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"Specify number of RQ pairs for processing NVMET cmds");
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/*
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* lpfc_nvmet_mrq_post: Specify number of RQ buffer to initially post
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* to each NVMET RQ. Range 64 to 2048, default is 512.
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*/
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LPFC_ATTR_R(nvmet_mrq_post,
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LPFC_NVMET_RQE_DEF_POST, LPFC_NVMET_RQE_MIN_POST,
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LPFC_NVMET_RQE_DEF_COUNT,
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"Specify number of RQ buffers to initially post");
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/*
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* lpfc_enable_fc4_type: Defines what FC4 types are supported.
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* Supported Values: 1 - register just FCP
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@ -5353,6 +5362,7 @@ struct device_attribute *lpfc_hba_attrs[] = {
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&dev_attr_lpfc_suppress_rsp,
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&dev_attr_lpfc_nvme_io_channel,
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&dev_attr_lpfc_nvmet_mrq,
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&dev_attr_lpfc_nvmet_mrq_post,
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&dev_attr_lpfc_nvme_enable_fb,
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&dev_attr_lpfc_nvmet_fb_size,
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&dev_attr_lpfc_enable_bg,
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@ -6403,6 +6413,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
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lpfc_enable_fc4_type_init(phba, lpfc_enable_fc4_type);
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lpfc_nvmet_mrq_init(phba, lpfc_nvmet_mrq);
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lpfc_nvmet_mrq_post_init(phba, lpfc_nvmet_mrq_post);
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/* Initialize first burst. Target vs Initiator are different. */
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lpfc_nvme_enable_fb_init(phba, lpfc_nvme_enable_fb);
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@ -22,8 +22,10 @@
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********************************************************************/
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#define LPFC_NVMET_DEFAULT_SEGS (64 + 1) /* 256K IOs */
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#define LPFC_NVMET_RQE_DEF_COUNT 512
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#define LPFC_NVMET_SUCCESS_LEN 12
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#define LPFC_NVMET_RQE_MIN_POST 128
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#define LPFC_NVMET_RQE_DEF_POST 512
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#define LPFC_NVMET_RQE_DEF_COUNT 2048
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#define LPFC_NVMET_SUCCESS_LEN 12
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#define LPFC_NVMET_MRQ_OFF 0xffff
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#define LPFC_NVMET_MRQ_AUTO 0
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@ -7199,7 +7199,7 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)
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lpfc_post_rq_buffer(
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phba, phba->sli4_hba.nvmet_mrq_hdr[i],
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phba->sli4_hba.nvmet_mrq_data[i],
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LPFC_NVMET_RQE_DEF_COUNT, i);
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phba->cfg_nvmet_mrq_post, i);
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}
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}
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