hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

net: ethernet: mtk-star-emac: use regmap bitops 

Shrink the code visually by replacing regmap_update_bits() with
appropriate regmap bit operations where applicable.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Bartosz Golaszewski 2020-05-28 17:45:03 +02:00 committed by David S. Miller
parent bfad978116
commit 240f1ae40c
1 changed files with 35 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

80
drivers/net/ethernet/mediatek/mtk_star_emac.c
View File

@ -413,8 +413,8 @@ static void mtk_star_dma_unmap_tx(struct mtk_star_priv *priv,
static void mtk_star_nic_disable_pd(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_MAC_CFG,
MTK_STAR_BIT_MAC_CFG_NIC_PD, 0);
regmap_clear_bits(priv->regs, MTK_STAR_REG_MAC_CFG,
MTK_STAR_BIT_MAC_CFG_NIC_PD);
}
/* Unmask the three interrupts we care about, mask all others. */
@ -434,41 +434,38 @@ static void mtk_star_intr_disable(struct mtk_star_priv *priv)
static void mtk_star_intr_enable_tx(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_TNTC, 0);
regmap_clear_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_TNTC);
}
static void mtk_star_intr_enable_rx(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_FNRC, 0);
regmap_clear_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_FNRC);
}
static void mtk_star_intr_enable_stats(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_REG_INT_STS_MIB_CNT_TH, 0);
regmap_clear_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_REG_INT_STS_MIB_CNT_TH);
}
static void mtk_star_intr_disable_tx(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_TNTC,
MTK_STAR_BIT_INT_STS_TNTC);
regmap_set_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_TNTC);
}
static void mtk_star_intr_disable_rx(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_FNRC,
MTK_STAR_BIT_INT_STS_FNRC);
regmap_set_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_BIT_INT_STS_FNRC);
}
static void mtk_star_intr_disable_stats(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_REG_INT_STS_MIB_CNT_TH,
MTK_STAR_REG_INT_STS_MIB_CNT_TH);
regmap_set_bits(priv->regs, MTK_STAR_REG_INT_MASK,
MTK_STAR_REG_INT_STS_MIB_CNT_TH);
}
static unsigned int mtk_star_intr_read(struct mtk_star_priv *priv)
@ -524,12 +521,10 @@ static void mtk_star_dma_init(struct mtk_star_priv *priv)
static void mtk_star_dma_start(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL,
MTK_STAR_BIT_TX_DMA_CTRL_START,
MTK_STAR_BIT_TX_DMA_CTRL_START);
regmap_update_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL,
MTK_STAR_BIT_RX_DMA_CTRL_START,
MTK_STAR_BIT_RX_DMA_CTRL_START);
regmap_set_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL,
MTK_STAR_BIT_TX_DMA_CTRL_START);
regmap_set_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL,
MTK_STAR_BIT_RX_DMA_CTRL_START);
}
static void mtk_star_dma_stop(struct mtk_star_priv *priv)
@ -553,16 +548,14 @@ static void mtk_star_dma_disable(struct mtk_star_priv *priv)
static void mtk_star_dma_resume_rx(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL,
MTK_STAR_BIT_RX_DMA_CTRL_RESUME,
MTK_STAR_BIT_RX_DMA_CTRL_RESUME);
regmap_set_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL,
MTK_STAR_BIT_RX_DMA_CTRL_RESUME);
}
static void mtk_star_dma_resume_tx(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL,
MTK_STAR_BIT_TX_DMA_CTRL_RESUME,
MTK_STAR_BIT_TX_DMA_CTRL_RESUME);
regmap_set_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL,
MTK_STAR_BIT_TX_DMA_CTRL_RESUME);
}
static void mtk_star_set_mac_addr(struct net_device *ndev)
@ -842,8 +835,8 @@ static int mtk_star_hash_wait_ok(struct mtk_star_priv *priv)
return ret;
/* Check the BIST_OK bit. */
regmap_read(priv->regs, MTK_STAR_REG_HASH_CTRL, &val);
if (!(val & MTK_STAR_BIT_HASH_CTRL_BIST_OK))
if (!regmap_test_bits(priv->regs, MTK_STAR_REG_HASH_CTRL,
MTK_STAR_BIT_HASH_CTRL_BIST_OK))
return -EIO;
return 0;
@ -877,12 +870,10 @@ static int mtk_star_reset_hash_table(struct mtk_star_priv *priv)
if (ret)
return ret;
regmap_update_bits(priv->regs, MTK_STAR_REG_HASH_CTRL,
MTK_STAR_BIT_HASH_CTRL_BIST_EN,
MTK_STAR_BIT_HASH_CTRL_BIST_EN);
regmap_update_bits(priv->regs, MTK_STAR_REG_TEST1,
MTK_STAR_BIT_TEST1_RST_HASH_MBIST,
MTK_STAR_BIT_TEST1_RST_HASH_MBIST);
regmap_set_bits(priv->regs, MTK_STAR_REG_HASH_CTRL,
MTK_STAR_BIT_HASH_CTRL_BIST_EN);
regmap_set_bits(priv->regs, MTK_STAR_REG_TEST1,
MTK_STAR_BIT_TEST1_RST_HASH_MBIST);
return mtk_star_hash_wait_ok(priv);
}
@ -1013,13 +1004,13 @@ static int mtk_star_enable(struct net_device *ndev)
return ret;
/* Setup the hashing algorithm */
regmap_update_bits(priv->regs, MTK_STAR_REG_ARL_CFG,
MTK_STAR_BIT_ARL_CFG_HASH_ALG |
MTK_STAR_BIT_ARL_CFG_MISC_MODE, 0);
regmap_clear_bits(priv->regs, MTK_STAR_REG_ARL_CFG,
MTK_STAR_BIT_ARL_CFG_HASH_ALG |
MTK_STAR_BIT_ARL_CFG_MISC_MODE);
/* Don't strip VLAN tags */
regmap_update_bits(priv->regs, MTK_STAR_REG_MAC_CFG,
MTK_STAR_BIT_MAC_CFG_VLAN_STRIP, 0);
regmap_clear_bits(priv->regs, MTK_STAR_REG_MAC_CFG,
MTK_STAR_BIT_MAC_CFG_VLAN_STRIP);
/* Setup DMA */
mtk_star_dma_init(priv);
@ -1201,9 +1192,8 @@ static void mtk_star_set_rx_mode(struct net_device *ndev)
int ret;
if (ndev->flags & IFF_PROMISC) {
regmap_update_bits(priv->regs, MTK_STAR_REG_ARL_CFG,
MTK_STAR_BIT_ARL_CFG_MISC_MODE,
MTK_STAR_BIT_ARL_CFG_MISC_MODE);
regmap_set_bits(priv->regs, MTK_STAR_REG_ARL_CFG,
MTK_STAR_BIT_ARL_CFG_MISC_MODE);
} else if (netdev_mc_count(ndev) > MTK_STAR_HASHTABLE_MC_LIMIT ||
ndev->flags & IFF_ALLMULTI) {
for (i = 0; i < MTK_STAR_HASHTABLE_SIZE_MAX; i++) {