Merge branch 'qed-fixes'
Manish Chopra says: ==================== qed: Bug fixes Please consider applying this series to net. V2: - Use available helpers for declaring bitmap and bitmap operations. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
23bd51e0f0
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@ -299,6 +299,7 @@ struct qed_hwfn {
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/* Flag indicating whether interrupts are enabled or not*/
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bool b_int_enabled;
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bool b_int_requested;
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struct qed_mcp_info *mcp_info;
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@ -491,6 +492,8 @@ u32 qed_unzip_data(struct qed_hwfn *p_hwfn,
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u32 input_len, u8 *input_buf,
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u32 max_size, u8 *unzip_buf);
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int qed_slowpath_irq_req(struct qed_hwfn *hwfn);
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#define QED_ETH_INTERFACE_VERSION 300
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#endif /* _QED_H */
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@ -1385,52 +1385,63 @@ err0:
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return rc;
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}
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static u32 qed_hw_bar_size(struct qed_dev *cdev,
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u8 bar_id)
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static u32 qed_hw_bar_size(struct qed_hwfn *p_hwfn,
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u8 bar_id)
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{
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u32 size = pci_resource_len(cdev->pdev, (bar_id > 0) ? 2 : 0);
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u32 bar_reg = (bar_id == 0 ? PGLUE_B_REG_PF_BAR0_SIZE
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: PGLUE_B_REG_PF_BAR1_SIZE);
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u32 val = qed_rd(p_hwfn, p_hwfn->p_main_ptt, bar_reg);
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return size / cdev->num_hwfns;
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/* Get the BAR size(in KB) from hardware given val */
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return 1 << (val + 15);
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}
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int qed_hw_prepare(struct qed_dev *cdev,
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int personality)
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{
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int rc, i;
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struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
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int rc;
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/* Store the precompiled init data ptrs */
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qed_init_iro_array(cdev);
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/* Initialize the first hwfn - will learn number of hwfns */
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rc = qed_hw_prepare_single(&cdev->hwfns[0], cdev->regview,
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rc = qed_hw_prepare_single(p_hwfn,
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cdev->regview,
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cdev->doorbells, personality);
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if (rc)
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return rc;
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personality = cdev->hwfns[0].hw_info.personality;
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personality = p_hwfn->hw_info.personality;
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/* Initialize the rest of the hwfns */
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for (i = 1; i < cdev->num_hwfns; i++) {
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if (cdev->num_hwfns > 1) {
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void __iomem *p_regview, *p_doorbell;
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u8 __iomem *addr;
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p_regview = cdev->regview +
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i * qed_hw_bar_size(cdev, 0);
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p_doorbell = cdev->doorbells +
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i * qed_hw_bar_size(cdev, 1);
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rc = qed_hw_prepare_single(&cdev->hwfns[i], p_regview,
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/* adjust bar offset for second engine */
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addr = cdev->regview + qed_hw_bar_size(p_hwfn, 0) / 2;
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p_regview = addr;
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/* adjust doorbell bar offset for second engine */
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addr = cdev->doorbells + qed_hw_bar_size(p_hwfn, 1) / 2;
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p_doorbell = addr;
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/* prepare second hw function */
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rc = qed_hw_prepare_single(&cdev->hwfns[1], p_regview,
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p_doorbell, personality);
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/* in case of error, need to free the previously
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* initiliazed hwfn 0.
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*/
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if (rc) {
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/* Cleanup previously initialized hwfns */
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while (--i >= 0) {
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qed_init_free(&cdev->hwfns[i]);
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qed_mcp_free(&cdev->hwfns[i]);
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qed_hw_hwfn_free(&cdev->hwfns[i]);
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}
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return rc;
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qed_init_free(p_hwfn);
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qed_mcp_free(p_hwfn);
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qed_hw_hwfn_free(p_hwfn);
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}
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}
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return 0;
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return rc;
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}
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void qed_hw_remove(struct qed_dev *cdev)
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@ -783,22 +783,16 @@ void qed_int_igu_enable_int(struct qed_hwfn *p_hwfn,
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qed_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, igu_pf_conf);
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}
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void qed_int_igu_enable(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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enum qed_int_mode int_mode)
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int qed_int_igu_enable(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
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enum qed_int_mode int_mode)
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{
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int i;
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p_hwfn->b_int_enabled = 1;
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int rc, i;
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/* Mask non-link attentions */
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for (i = 0; i < 9; i++)
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qed_wr(p_hwfn, p_ptt,
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MISC_REG_AEU_ENABLE1_IGU_OUT_0 + (i << 2), 0);
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/* Enable interrupt Generation */
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qed_int_igu_enable_int(p_hwfn, p_ptt, int_mode);
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/* Configure AEU signal change to produce attentions for link */
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qed_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0xfff);
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qed_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0xfff);
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@ -808,6 +802,19 @@ void qed_int_igu_enable(struct qed_hwfn *p_hwfn,
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/* Unmask AEU signals toward IGU */
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qed_wr(p_hwfn, p_ptt, MISC_REG_AEU_MASK_ATTN_IGU, 0xff);
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if ((int_mode != QED_INT_MODE_INTA) || IS_LEAD_HWFN(p_hwfn)) {
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rc = qed_slowpath_irq_req(p_hwfn);
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if (rc != 0) {
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DP_NOTICE(p_hwfn, "Slowpath IRQ request failed\n");
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return -EINVAL;
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}
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p_hwfn->b_int_requested = true;
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}
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/* Enable interrupt Generation */
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qed_int_igu_enable_int(p_hwfn, p_ptt, int_mode);
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p_hwfn->b_int_enabled = 1;
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return rc;
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}
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void qed_int_igu_disable_int(struct qed_hwfn *p_hwfn,
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@ -1127,3 +1134,11 @@ int qed_int_get_num_sbs(struct qed_hwfn *p_hwfn,
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return info->igu_sb_cnt;
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}
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void qed_int_disable_post_isr_release(struct qed_dev *cdev)
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{
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int i;
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for_each_hwfn(cdev, i)
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cdev->hwfns[i].b_int_requested = false;
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}
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@ -169,10 +169,14 @@ int qed_int_get_num_sbs(struct qed_hwfn *p_hwfn,
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int *p_iov_blks);
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/**
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* @file
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* @brief qed_int_disable_post_isr_release - performs the cleanup post ISR
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* release. The API need to be called after releasing all slowpath IRQs
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* of the device.
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*
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* @param cdev
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*
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* @brief Interrupt handler
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*/
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void qed_int_disable_post_isr_release(struct qed_dev *cdev);
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#define QED_CAU_DEF_RX_TIMER_RES 0
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#define QED_CAU_DEF_TX_TIMER_RES 0
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@ -366,10 +370,11 @@ void qed_int_setup(struct qed_hwfn *p_hwfn,
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* @param p_hwfn
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* @param p_ptt
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* @param int_mode
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*
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* @return int
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*/
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void qed_int_igu_enable(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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enum qed_int_mode int_mode);
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int qed_int_igu_enable(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
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enum qed_int_mode int_mode);
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/**
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* @brief - Initialize CAU status block entry
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@ -476,41 +476,22 @@ static irqreturn_t qed_single_int(int irq, void *dev_instance)
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return rc;
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}
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static int qed_slowpath_irq_req(struct qed_dev *cdev)
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int qed_slowpath_irq_req(struct qed_hwfn *hwfn)
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{
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int i = 0, rc = 0;
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struct qed_dev *cdev = hwfn->cdev;
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int rc = 0;
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u8 id;
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if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
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/* Request all the slowpath MSI-X vectors */
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for (i = 0; i < cdev->num_hwfns; i++) {
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snprintf(cdev->hwfns[i].name, NAME_SIZE,
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"sp-%d-%02x:%02x.%02x",
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i, cdev->pdev->bus->number,
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PCI_SLOT(cdev->pdev->devfn),
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cdev->hwfns[i].abs_pf_id);
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rc = request_irq(cdev->int_params.msix_table[i].vector,
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qed_msix_sp_int, 0,
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cdev->hwfns[i].name,
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cdev->hwfns[i].sp_dpc);
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if (rc)
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break;
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DP_VERBOSE(&cdev->hwfns[i],
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(NETIF_MSG_INTR | QED_MSG_SP),
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id = hwfn->my_id;
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snprintf(hwfn->name, NAME_SIZE, "sp-%d-%02x:%02x.%02x",
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id, cdev->pdev->bus->number,
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PCI_SLOT(cdev->pdev->devfn), hwfn->abs_pf_id);
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rc = request_irq(cdev->int_params.msix_table[id].vector,
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qed_msix_sp_int, 0, hwfn->name, hwfn->sp_dpc);
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if (!rc)
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DP_VERBOSE(hwfn, (NETIF_MSG_INTR | QED_MSG_SP),
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"Requested slowpath MSI-X\n");
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}
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if (i != cdev->num_hwfns) {
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/* Free already request MSI-X vectors */
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for (i--; i >= 0; i--) {
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unsigned int vec =
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cdev->int_params.msix_table[i].vector;
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synchronize_irq(vec);
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free_irq(cdev->int_params.msix_table[i].vector,
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cdev->hwfns[i].sp_dpc);
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}
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}
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} else {
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unsigned long flags = 0;
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@ -534,13 +515,17 @@ static void qed_slowpath_irq_free(struct qed_dev *cdev)
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if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
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for_each_hwfn(cdev, i) {
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if (!cdev->hwfns[i].b_int_requested)
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break;
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synchronize_irq(cdev->int_params.msix_table[i].vector);
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free_irq(cdev->int_params.msix_table[i].vector,
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cdev->hwfns[i].sp_dpc);
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}
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} else {
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free_irq(cdev->pdev->irq, cdev);
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if (QED_LEADING_HWFN(cdev)->b_int_requested)
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free_irq(cdev->pdev->irq, cdev);
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}
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qed_int_disable_post_isr_release(cdev);
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}
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static int qed_nic_stop(struct qed_dev *cdev)
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@ -765,16 +750,11 @@ static int qed_slowpath_start(struct qed_dev *cdev,
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if (rc)
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goto err1;
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/* Request the slowpath IRQ */
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rc = qed_slowpath_irq_req(cdev);
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if (rc)
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goto err2;
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/* Allocate stream for unzipping */
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rc = qed_alloc_stream_mem(cdev);
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if (rc) {
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DP_NOTICE(cdev, "Failed to allocate stream memory\n");
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goto err3;
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goto err2;
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}
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/* Start the slowpath */
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@ -363,4 +363,8 @@
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0x7 << 0)
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#define MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT \
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0
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#define PGLUE_B_REG_PF_BAR0_SIZE \
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0x2aae60UL
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#define PGLUE_B_REG_PF_BAR1_SIZE \
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0x2aae64UL
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#endif
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@ -124,8 +124,12 @@ struct qed_spq {
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dma_addr_t p_phys;
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struct qed_spq_entry *p_virt;
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/* Used as index for completions (returns on EQ by FW) */
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u16 echo_idx;
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#define SPQ_RING_SIZE \
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(CORE_SPQE_PAGE_SIZE_BYTES / sizeof(struct slow_path_element))
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/* Bitmap for handling out-of-order completions */
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DECLARE_BITMAP(p_comp_bitmap, SPQ_RING_SIZE);
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u8 comp_bitmap_idx;
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/* Statistics */
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u32 unlimited_pending_count;
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@ -112,8 +112,6 @@ static int
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qed_spq_fill_entry(struct qed_hwfn *p_hwfn,
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struct qed_spq_entry *p_ent)
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{
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p_ent->elem.hdr.echo = 0;
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p_hwfn->p_spq->echo_idx++;
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p_ent->flags = 0;
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switch (p_ent->comp_mode) {
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@ -195,10 +193,12 @@ static int qed_spq_hw_post(struct qed_hwfn *p_hwfn,
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struct qed_spq *p_spq,
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struct qed_spq_entry *p_ent)
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{
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struct qed_chain *p_chain = &p_hwfn->p_spq->chain;
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struct qed_chain *p_chain = &p_hwfn->p_spq->chain;
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u16 echo = qed_chain_get_prod_idx(p_chain);
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struct slow_path_element *elem;
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struct core_db_data db;
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p_ent->elem.hdr.echo = cpu_to_le16(echo);
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elem = qed_chain_produce(p_chain);
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if (!elem) {
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DP_NOTICE(p_hwfn, "Failed to produce from SPQ chain\n");
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|
@ -437,7 +437,9 @@ void qed_spq_setup(struct qed_hwfn *p_hwfn)
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p_spq->comp_count = 0;
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p_spq->comp_sent_count = 0;
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p_spq->unlimited_pending_count = 0;
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p_spq->echo_idx = 0;
|
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|
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bitmap_zero(p_spq->p_comp_bitmap, SPQ_RING_SIZE);
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p_spq->comp_bitmap_idx = 0;
|
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|
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/* SPQ cid, cannot fail */
|
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qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_spq->cid);
|
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|
@ -582,26 +584,32 @@ qed_spq_add_entry(struct qed_hwfn *p_hwfn,
|
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struct qed_spq *p_spq = p_hwfn->p_spq;
|
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|
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if (p_ent->queue == &p_spq->unlimited_pending) {
|
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struct qed_spq_entry *p_en2;
|
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|
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if (list_empty(&p_spq->free_pool)) {
|
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list_add_tail(&p_ent->list, &p_spq->unlimited_pending);
|
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p_spq->unlimited_pending_count++;
|
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|
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return 0;
|
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} else {
|
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struct qed_spq_entry *p_en2;
|
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|
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p_en2 = list_first_entry(&p_spq->free_pool,
|
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struct qed_spq_entry,
|
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list);
|
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list_del(&p_en2->list);
|
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|
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/* Copy the ring element physical pointer to the new
|
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* entry, since we are about to override the entire ring
|
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* entry and don't want to lose the pointer.
|
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*/
|
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p_ent->elem.data_ptr = p_en2->elem.data_ptr;
|
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|
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*p_en2 = *p_ent;
|
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|
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kfree(p_ent);
|
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|
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p_ent = p_en2;
|
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}
|
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|
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p_en2 = list_first_entry(&p_spq->free_pool,
|
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struct qed_spq_entry,
|
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list);
|
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list_del(&p_en2->list);
|
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|
||||
/* Strcut assignment */
|
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*p_en2 = *p_ent;
|
||||
|
||||
kfree(p_ent);
|
||||
|
||||
p_ent = p_en2;
|
||||
}
|
||||
|
||||
/* entry is to be placed in 'pending' queue */
|
||||
|
@ -777,13 +785,38 @@ int qed_spq_completion(struct qed_hwfn *p_hwfn,
|
|||
list_for_each_entry_safe(p_ent, tmp, &p_spq->completion_pending,
|
||||
list) {
|
||||
if (p_ent->elem.hdr.echo == echo) {
|
||||
u16 pos = le16_to_cpu(echo) % SPQ_RING_SIZE;
|
||||
|
||||
list_del(&p_ent->list);
|
||||
|
||||
qed_chain_return_produced(&p_spq->chain);
|
||||
/* Avoid overriding of SPQ entries when getting
|
||||
* out-of-order completions, by marking the completions
|
||||
* in a bitmap and increasing the chain consumer only
|
||||
* for the first successive completed entries.
|
||||
*/
|
||||
bitmap_set(p_spq->p_comp_bitmap, pos, SPQ_RING_SIZE);
|
||||
|
||||
while (test_bit(p_spq->comp_bitmap_idx,
|
||||
p_spq->p_comp_bitmap)) {
|
||||
bitmap_clear(p_spq->p_comp_bitmap,
|
||||
p_spq->comp_bitmap_idx,
|
||||
SPQ_RING_SIZE);
|
||||
p_spq->comp_bitmap_idx++;
|
||||
qed_chain_return_produced(&p_spq->chain);
|
||||
}
|
||||
|
||||
p_spq->comp_count++;
|
||||
found = p_ent;
|
||||
break;
|
||||
}
|
||||
|
||||
/* This is relatively uncommon - depends on scenarios
|
||||
* which have mutliple per-PF sent ramrods.
|
||||
*/
|
||||
DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
|
||||
"Got completion for echo %04x - doesn't match echo %04x in completion pending list\n",
|
||||
le16_to_cpu(echo),
|
||||
le16_to_cpu(p_ent->elem.hdr.echo));
|
||||
}
|
||||
|
||||
/* Release lock before callback, as callback may post
|
||||
|
|
|
@ -9,6 +9,8 @@
|
|||
#ifndef __COMMON_HSI__
|
||||
#define __COMMON_HSI__
|
||||
|
||||
#define CORE_SPQE_PAGE_SIZE_BYTES 4096
|
||||
|
||||
#define FW_MAJOR_VERSION 8
|
||||
#define FW_MINOR_VERSION 4
|
||||
#define FW_REVISION_VERSION 2
|
||||
|
|
|
@ -111,7 +111,8 @@ static inline u16 qed_chain_get_elem_left(struct qed_chain *p_chain)
|
|||
used = ((u32)0x10000u + (u32)(p_chain->prod_idx)) -
|
||||
(u32)p_chain->cons_idx;
|
||||
if (p_chain->mode == QED_CHAIN_MODE_NEXT_PTR)
|
||||
used -= (used / p_chain->elem_per_page);
|
||||
used -= p_chain->prod_idx / p_chain->elem_per_page -
|
||||
p_chain->cons_idx / p_chain->elem_per_page;
|
||||
|
||||
return p_chain->capacity - used;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue