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[MIPS] Alchemy: Au1210/Au1250 CPU support 

This patch adds IDs for new Au1200 variants: Au1210 and Au1250.
They are essentially identical to the Au1200 except for the Au1210
which has a different SoC-ID in the PRId register [bits 31:24].
The Au1250 is a "Au1200 V0.2".

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss 2007-12-06 09:07:55 +01:00 committed by Ralf Baechle
parent c5ec1983e4
commit 237cfee1db
4 changed files with 15 additions and 2 deletions
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9
arch/mips/kernel/cpu-probe.c
View File

@ -188,6 +188,8 @@ static inline void check_wait(void)
case CPU_AU1500: case CPU_AU1500:
case CPU_AU1550: case CPU_AU1550:
case CPU_AU1200: case CPU_AU1200:
case CPU_AU1210:
case CPU_AU1250:
if (allow_au1k_wait) if (allow_au1k_wait)
cpu_wait = au1k_wait; cpu_wait = au1k_wait;
break; break;
@ -733,6 +735,11 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
break; break;
case 4: case 4:
c->cputype = CPU_AU1200; c->cputype = CPU_AU1200;
if (2 == (c->processor_id & 0xff))
c->cputype = CPU_AU1250;
break;
case 5:
c->cputype = CPU_AU1210;
break; break;
default: default:
panic("Unknown Au Core!"); panic("Unknown Au Core!");
@ -858,6 +865,8 @@ static __init const char *cpu_to_name(struct cpuinfo_mips *c)
case CPU_AU1100: name = "Au1100"; break; case CPU_AU1100: name = "Au1100"; break;
case CPU_AU1550: name = "Au1550"; break; case CPU_AU1550: name = "Au1550"; break;
case CPU_AU1200: name = "Au1200"; break; case CPU_AU1200: name = "Au1200"; break;
case CPU_AU1210: name = "Au1210"; break;
case CPU_AU1250: name = "Au1250"; break;
case CPU_4KEC: name = "MIPS 4KEc"; break; case CPU_4KEC: name = "MIPS 4KEc"; break;
case CPU_4KSC: name = "MIPS 4KSc"; break; case CPU_4KSC: name = "MIPS 4KSc"; break;
case CPU_VR41XX: name = "NEC Vr41xx"; break; case CPU_VR41XX: name = "NEC Vr41xx"; break;

2
arch/mips/mm/c-r4k.c
View File

@ -980,6 +980,8 @@ static void __init probe_pcache(void)
case CPU_AU1100: case CPU_AU1100:
case CPU_AU1550: case CPU_AU1550:
case CPU_AU1200: case CPU_AU1200:
case CPU_AU1210:
case CPU_AU1250:
c->icache.flags |= MIPS_CACHE_IC_F_DC; c->icache.flags |= MIPS_CACHE_IC_F_DC;
break; break;
} }

2
arch/mips/mm/tlbex.c
View File

@ -917,6 +917,8 @@ static void __init build_tlb_write_entry(u32 **p, struct label **l,
case CPU_AU1500: case CPU_AU1500:
case CPU_AU1550: case CPU_AU1550:
case CPU_AU1200: case CPU_AU1200:
case CPU_AU1210:
case CPU_AU1250:
case CPU_PR4450: case CPU_PR4450:
i_nop(p); i_nop(p);
tlbw(p); tlbw(p);

4
include/asm-mips/cpu.h
View File

@ -195,8 +195,8 @@ enum cpu_type_enum {
* MIPS32 class processors * MIPS32 class processors
*/ */
CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000, CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000,
CPU_AU1100, CPU_AU1200, CPU_AU1500, CPU_AU1550, CPU_PR4450, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500, CPU_AU1550,
CPU_BCM3302, CPU_BCM4710, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
/* /*
* MIPS64 class processors * MIPS64 class processors