Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu: "This fixes three issues: - if ccp is loaded on a machine without ccp, it will incorrectly activate causing all requests to fail. Fixed by preventing ccp from loading if hardware isn't available. - not all IRQs were enabled for the qat driver, leading to potential stalls when it is used - disabled buggy AVX CTR implementation in aesni" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: aesni - disable "by8" AVX CTR optimization crypto: ccp - Check for CCP before registering crypto algs crypto: qat - Enable all 32 IRQs
This commit is contained in:
commit
2368a9426f
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@ -481,7 +481,7 @@ static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
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crypto_inc(ctrblk, AES_BLOCK_SIZE);
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crypto_inc(ctrblk, AES_BLOCK_SIZE);
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}
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}
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#ifdef CONFIG_AS_AVX
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#if 0 /* temporary disabled due to failing crypto tests */
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static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
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static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len, u8 *iv)
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const u8 *in, unsigned int len, u8 *iv)
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{
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{
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@ -1522,7 +1522,7 @@ static int __init aesni_init(void)
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aesni_gcm_dec_tfm = aesni_gcm_dec;
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aesni_gcm_dec_tfm = aesni_gcm_dec;
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}
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}
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aesni_ctr_enc_tfm = aesni_ctr_enc;
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aesni_ctr_enc_tfm = aesni_ctr_enc;
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#ifdef CONFIG_AS_AVX
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#if 0 /* temporary disabled due to failing crypto tests */
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if (cpu_has_avx) {
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if (cpu_has_avx) {
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/* optimize performance of ctr mode encryption transform */
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/* optimize performance of ctr mode encryption transform */
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aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;
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aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;
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@ -367,6 +367,10 @@ static int ccp_crypto_init(void)
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{
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{
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int ret;
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int ret;
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ret = ccp_present();
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if (ret)
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return ret;
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spin_lock_init(&req_queue_lock);
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spin_lock_init(&req_queue_lock);
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INIT_LIST_HEAD(&req_queue.cmds);
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INIT_LIST_HEAD(&req_queue.cmds);
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req_queue.backlog = &req_queue.cmds;
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req_queue.backlog = &req_queue.cmds;
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@ -54,6 +54,20 @@ static inline void ccp_del_device(struct ccp_device *ccp)
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ccp_dev = NULL;
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ccp_dev = NULL;
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}
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}
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/**
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* ccp_present - check if a CCP device is present
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*
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* Returns zero if a CCP device is present, -ENODEV otherwise.
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*/
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int ccp_present(void)
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{
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if (ccp_get_device())
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return 0;
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return -ENODEV;
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}
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EXPORT_SYMBOL_GPL(ccp_present);
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/**
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/**
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* ccp_enqueue_cmd - queue an operation for processing by the CCP
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* ccp_enqueue_cmd - queue an operation for processing by the CCP
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*
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*
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@ -66,7 +66,7 @@
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#define ADF_DH895XCC_ETR_MAX_BANKS 32
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#define ADF_DH895XCC_ETR_MAX_BANKS 32
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#define ADF_DH895XCC_SMIAPF0_MASK_OFFSET (0x3A000 + 0x28)
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#define ADF_DH895XCC_SMIAPF0_MASK_OFFSET (0x3A000 + 0x28)
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#define ADF_DH895XCC_SMIAPF1_MASK_OFFSET (0x3A000 + 0x30)
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#define ADF_DH895XCC_SMIAPF1_MASK_OFFSET (0x3A000 + 0x30)
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#define ADF_DH895XCC_SMIA0_MASK 0xFFFF
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#define ADF_DH895XCC_SMIA0_MASK 0xFFFFFFFF
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#define ADF_DH895XCC_SMIA1_MASK 0x1
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#define ADF_DH895XCC_SMIA1_MASK 0x1
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/* Error detection and correction */
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/* Error detection and correction */
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#define ADF_DH895XCC_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818)
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#define ADF_DH895XCC_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818)
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@ -26,6 +26,13 @@ struct ccp_cmd;
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#if defined(CONFIG_CRYPTO_DEV_CCP_DD) || \
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#if defined(CONFIG_CRYPTO_DEV_CCP_DD) || \
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defined(CONFIG_CRYPTO_DEV_CCP_DD_MODULE)
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defined(CONFIG_CRYPTO_DEV_CCP_DD_MODULE)
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/**
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* ccp_present - check if a CCP device is present
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*
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* Returns zero if a CCP device is present, -ENODEV otherwise.
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*/
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int ccp_present(void);
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/**
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/**
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* ccp_enqueue_cmd - queue an operation for processing by the CCP
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* ccp_enqueue_cmd - queue an operation for processing by the CCP
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*
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*
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@ -53,6 +60,11 @@ int ccp_enqueue_cmd(struct ccp_cmd *cmd);
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#else /* CONFIG_CRYPTO_DEV_CCP_DD is not enabled */
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#else /* CONFIG_CRYPTO_DEV_CCP_DD is not enabled */
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static inline int ccp_present(void)
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{
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return -ENODEV;
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}
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static inline int ccp_enqueue_cmd(struct ccp_cmd *cmd)
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static inline int ccp_enqueue_cmd(struct ccp_cmd *cmd)
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{
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{
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return -ENODEV;
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return -ENODEV;
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