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mmc: sdhci: convert generic bus width setup to library function 

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
This commit is contained in:
Russell King 2014-04-25 12:57:07 +01:00 committed by Chris Ball
parent 5b4f1f6c49
commit 2317f56c05
19 changed files with 50 additions and 50 deletions
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2
drivers/mmc/host/sdhci-acpi.c
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@ -103,10 +103,12 @@ static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
static const struct sdhci_ops sdhci_acpi_ops_dflt = { static const struct sdhci_ops sdhci_acpi_ops_dflt = {
.enable_dma = sdhci_acpi_enable_dma, .enable_dma = sdhci_acpi_enable_dma,
.set_bus_width = sdhci_set_bus_width,
}; };
static const struct sdhci_ops sdhci_acpi_ops_int = { static const struct sdhci_ops sdhci_acpi_ops_int = {
.enable_dma = sdhci_acpi_enable_dma, .enable_dma = sdhci_acpi_enable_dma,
.set_bus_width = sdhci_set_bus_width,
.hw_reset = sdhci_acpi_int_hw_reset, .hw_reset = sdhci_acpi_int_hw_reset,
}; };

1
drivers/mmc/host/sdhci-bcm-kona.c
View File

@ -209,6 +209,7 @@ static struct sdhci_ops sdhci_bcm_kona_ops = {
.get_max_clock = sdhci_bcm_kona_get_max_clk, .get_max_clock = sdhci_bcm_kona_get_max_clk,
.get_timeout_clock = sdhci_bcm_kona_get_timeout_clock, .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
.platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks, .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
.set_bus_width = sdhci_set_bus_width,
.card_event = sdhci_bcm_kona_card_event, .card_event = sdhci_bcm_kona_card_event,
}; };

1
drivers/mmc/host/sdhci-bcm2835.c
View File

@ -133,6 +133,7 @@ static const struct sdhci_ops bcm2835_sdhci_ops = {
.read_b = bcm2835_sdhci_readb, .read_b = bcm2835_sdhci_readb,
.get_max_clock = sdhci_pltfm_clk_get_max_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock,
.get_min_clock = bcm2835_sdhci_get_min_clock, .get_min_clock = bcm2835_sdhci_get_min_clock,
.set_bus_width = sdhci_set_bus_width,
}; };
static const struct sdhci_pltfm_data bcm2835_sdhci_pdata = { static const struct sdhci_pltfm_data bcm2835_sdhci_pdata = {

1
drivers/mmc/host/sdhci-cns3xxx.c
View File

@ -82,6 +82,7 @@ out:
static const struct sdhci_ops sdhci_cns3xxx_ops = { static const struct sdhci_ops sdhci_cns3xxx_ops = {
.get_max_clock = sdhci_cns3xxx_get_max_clk, .get_max_clock = sdhci_cns3xxx_get_max_clk,
.set_clock = sdhci_cns3xxx_set_clock, .set_clock = sdhci_cns3xxx_set_clock,
.set_bus_width = sdhci_set_bus_width,
}; };
static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = { static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {

1
drivers/mmc/host/sdhci-dove.c
View File

@ -86,6 +86,7 @@ static u32 sdhci_dove_readl(struct sdhci_host *host, int reg)
static const struct sdhci_ops sdhci_dove_ops = { static const struct sdhci_ops sdhci_dove_ops = {
.read_w = sdhci_dove_readw, .read_w = sdhci_dove_readw,
.read_l = sdhci_dove_readl, .read_l = sdhci_dove_readl,
.set_bus_width = sdhci_set_bus_width,
}; };
static const struct sdhci_pltfm_data sdhci_dove_pdata = { static const struct sdhci_pltfm_data sdhci_dove_pdata = {

6
drivers/mmc/host/sdhci-esdhc-imx.c
View File

@ -668,7 +668,7 @@ static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
return -ENOSYS; return -ENOSYS;
} }
static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width) static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
{ {
u32 ctrl; u32 ctrl;
@ -686,8 +686,6 @@ static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
esdhc_clrset_le(host, ESDHC_CTRL_BUSWIDTH_MASK, ctrl, esdhc_clrset_le(host, ESDHC_CTRL_BUSWIDTH_MASK, ctrl,
SDHCI_HOST_CONTROL); SDHCI_HOST_CONTROL);
return 0;
} }
static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val) static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
@ -888,7 +886,7 @@ static struct sdhci_ops sdhci_esdhc_ops = {
.get_max_clock = esdhc_pltfm_get_max_clock, .get_max_clock = esdhc_pltfm_get_max_clock,
.get_min_clock = esdhc_pltfm_get_min_clock, .get_min_clock = esdhc_pltfm_get_min_clock,
.get_ro = esdhc_pltfm_get_ro, .get_ro = esdhc_pltfm_get_ro,
.platform_bus_width = esdhc_pltfm_bus_width, .set_bus_width = esdhc_pltfm_set_bus_width,
.set_uhs_signaling = esdhc_set_uhs_signaling, .set_uhs_signaling = esdhc_set_uhs_signaling,
}; };

1
drivers/mmc/host/sdhci-of-arasan.c
View File

@ -54,6 +54,7 @@ static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
static struct sdhci_ops sdhci_arasan_ops = { static struct sdhci_ops sdhci_arasan_ops = {
.get_max_clock = sdhci_pltfm_clk_get_max_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock,
.get_timeout_clock = sdhci_arasan_get_timeout_clock, .get_timeout_clock = sdhci_arasan_get_timeout_clock,
.set_bus_width = sdhci_set_bus_width,
}; };
static struct sdhci_pltfm_data sdhci_arasan_pdata = { static struct sdhci_pltfm_data sdhci_arasan_pdata = {

6
drivers/mmc/host/sdhci-of-esdhc.c
View File

@ -269,7 +269,7 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ; host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
} }
static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width) static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
{ {
u32 ctrl; u32 ctrl;
@ -289,8 +289,6 @@ static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
clrsetbits_be32(host->ioaddr + SDHCI_HOST_CONTROL, clrsetbits_be32(host->ioaddr + SDHCI_HOST_CONTROL,
ESDHC_CTRL_BUSWIDTH_MASK, ctrl); ESDHC_CTRL_BUSWIDTH_MASK, ctrl);
return 0;
} }
static const struct sdhci_ops sdhci_esdhc_ops = { static const struct sdhci_ops sdhci_esdhc_ops = {
@ -310,7 +308,7 @@ static const struct sdhci_ops sdhci_esdhc_ops = {
.platform_resume = esdhc_of_resume, .platform_resume = esdhc_of_resume,
#endif #endif
.adma_workaround = esdhci_of_adma_workaround, .adma_workaround = esdhci_of_adma_workaround,
.platform_bus_width = esdhc_pltfm_bus_width, .set_bus_width = esdhc_pltfm_set_bus_width,
}; };
static const struct sdhci_pltfm_data sdhci_esdhc_pdata = { static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {

1
drivers/mmc/host/sdhci-of-hlwd.c
View File

@ -58,6 +58,7 @@ static const struct sdhci_ops sdhci_hlwd_ops = {
.write_l = sdhci_hlwd_writel, .write_l = sdhci_hlwd_writel,
.write_w = sdhci_hlwd_writew, .write_w = sdhci_hlwd_writew,
.write_b = sdhci_hlwd_writeb, .write_b = sdhci_hlwd_writeb,
.set_bus_width = sdhci_set_bus_width,
}; };
static const struct sdhci_pltfm_data sdhci_hlwd_pdata = { static const struct sdhci_pltfm_data sdhci_hlwd_pdata = {

6
drivers/mmc/host/sdhci-pci.c
View File

@ -1031,7 +1031,7 @@ static int sdhci_pci_enable_dma(struct sdhci_host *host)
return 0; return 0;
} }
static int sdhci_pci_bus_width(struct sdhci_host *host, int width) static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
{ {
u8 ctrl; u8 ctrl;
@ -1052,8 +1052,6 @@ static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
} }
sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
return 0;
} }
static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host) static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
@ -1081,7 +1079,7 @@ static void sdhci_pci_hw_reset(struct sdhci_host *host)
static const struct sdhci_ops sdhci_pci_ops = { static const struct sdhci_ops sdhci_pci_ops = {
.enable_dma = sdhci_pci_enable_dma, .enable_dma = sdhci_pci_enable_dma,
.platform_bus_width = sdhci_pci_bus_width, .set_bus_width = sdhci_pci_set_bus_width,
.hw_reset = sdhci_pci_hw_reset, .hw_reset = sdhci_pci_hw_reset,
}; };

1
drivers/mmc/host/sdhci-pltfm.c
View File

@ -45,6 +45,7 @@ unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host)
EXPORT_SYMBOL_GPL(sdhci_pltfm_clk_get_max_clock); EXPORT_SYMBOL_GPL(sdhci_pltfm_clk_get_max_clock);
static const struct sdhci_ops sdhci_pltfm_ops = { static const struct sdhci_ops sdhci_pltfm_ops = {
.set_bus_width = sdhci_set_bus_width,
}; };
#ifdef CONFIG_OF #ifdef CONFIG_OF

6
drivers/mmc/host/sdhci-pxav2.c
View File

@ -88,7 +88,7 @@ static void pxav2_set_private_registers(struct sdhci_host *host, u8 mask)
} }
} }
static int pxav2_mmc_set_width(struct sdhci_host *host, int width) static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width)
{ {
u8 ctrl; u8 ctrl;
u16 tmp; u16 tmp;
@ -107,14 +107,12 @@ static int pxav2_mmc_set_width(struct sdhci_host *host, int width)
} }
writew(tmp, host->ioaddr + SD_CE_ATA_2); writew(tmp, host->ioaddr + SD_CE_ATA_2);
writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
return 0;
} }
static const struct sdhci_ops pxav2_sdhci_ops = { static const struct sdhci_ops pxav2_sdhci_ops = {
.get_max_clock = sdhci_pltfm_clk_get_max_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock,
.platform_reset_exit = pxav2_set_private_registers, .platform_reset_exit = pxav2_set_private_registers,
.platform_bus_width = pxav2_mmc_set_width, .set_bus_width = pxav2_mmc_set_bus_width,
}; };
#ifdef CONFIG_OF #ifdef CONFIG_OF

1
drivers/mmc/host/sdhci-pxav3.c
View File

@ -227,6 +227,7 @@ static const struct sdhci_ops pxav3_sdhci_ops = {
.set_uhs_signaling = pxav3_set_uhs_signaling, .set_uhs_signaling = pxav3_set_uhs_signaling,
.platform_send_init_74_clocks = pxav3_gen_init_74_clocks, .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
.get_max_clock = sdhci_pltfm_clk_get_max_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock,
.set_bus_width = sdhci_set_bus_width,
}; };
static struct sdhci_pltfm_data sdhci_pxav3_pdata = { static struct sdhci_pltfm_data sdhci_pxav3_pdata = {

8
drivers/mmc/host/sdhci-s3c.c
View File

@ -326,14 +326,14 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
} }
/** /**
* sdhci_s3c_platform_bus_width - support 8bit buswidth * sdhci_s3c_set_bus_width - support 8bit buswidth
* @host: The SDHCI host being queried * @host: The SDHCI host being queried
* @width: MMC_BUS_WIDTH_ macro for the bus width being requested * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
* *
* We have 8-bit width support but is not a v3 controller. * We have 8-bit width support but is not a v3 controller.
* So we add platform_bus_width() and support 8bit width. * So we add platform_bus_width() and support 8bit width.
*/ */
static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width) static void sdhci_s3c_set_bus_width(struct sdhci_host *host, int width)
{ {
u8 ctrl; u8 ctrl;
@ -355,15 +355,13 @@ static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width)
} }
sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
return 0;
} }
static struct sdhci_ops sdhci_s3c_ops = { static struct sdhci_ops sdhci_s3c_ops = {
.get_max_clock = sdhci_s3c_get_max_clk, .get_max_clock = sdhci_s3c_get_max_clk,
.set_clock = sdhci_s3c_set_clock, .set_clock = sdhci_s3c_set_clock,
.get_min_clock = sdhci_s3c_get_min_clock, .get_min_clock = sdhci_s3c_get_min_clock,
.platform_bus_width = sdhci_s3c_platform_bus_width, .set_bus_width = sdhci_s3c_set_bus_width,
}; };
static void sdhci_s3c_notify_change(struct platform_device *dev, int state) static void sdhci_s3c_notify_change(struct platform_device *dev, int state)

1
drivers/mmc/host/sdhci-sirf.c
View File

@ -29,6 +29,7 @@ static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host)
static struct sdhci_ops sdhci_sirf_ops = { static struct sdhci_ops sdhci_sirf_ops = {
.get_max_clock = sdhci_sirf_get_max_clk, .get_max_clock = sdhci_sirf_get_max_clk,
.set_bus_width = sdhci_set_bus_width,
}; };
static struct sdhci_pltfm_data sdhci_sirf_pdata = { static struct sdhci_pltfm_data sdhci_sirf_pdata = {

2
drivers/mmc/host/sdhci-spear.c
View File

@ -38,7 +38,7 @@ struct spear_sdhci {
/* sdhci ops */ /* sdhci ops */
static const struct sdhci_ops sdhci_pltfm_ops = { static const struct sdhci_ops sdhci_pltfm_ops = {
/* Nothing to do for now. */ .set_bus_width = sdhci_set_bus_width,
}; };
#ifdef CONFIG_OF #ifdef CONFIG_OF

5
drivers/mmc/host/sdhci-tegra.c
View File

@ -127,7 +127,7 @@ static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask)
} }
} }
static int tegra_sdhci_buswidth(struct sdhci_host *host, int bus_width) static void tegra_sdhci_set_bus_width(struct sdhci_host *host, int bus_width)
{ {
u32 ctrl; u32 ctrl;
@ -144,7 +144,6 @@ static int tegra_sdhci_buswidth(struct sdhci_host *host, int bus_width)
ctrl &= ~SDHCI_CTRL_4BITBUS; ctrl &= ~SDHCI_CTRL_4BITBUS;
} }
sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
return 0;
} }
static const struct sdhci_ops tegra_sdhci_ops = { static const struct sdhci_ops tegra_sdhci_ops = {
@ -152,7 +151,7 @@ static const struct sdhci_ops tegra_sdhci_ops = {
.read_l = tegra_sdhci_readl, .read_l = tegra_sdhci_readl,
.read_w = tegra_sdhci_readw, .read_w = tegra_sdhci_readw,
.write_l = tegra_sdhci_writel, .write_l = tegra_sdhci_writel,
.platform_bus_width = tegra_sdhci_buswidth, .set_bus_width = tegra_sdhci_set_bus_width,
.platform_reset_exit = tegra_sdhci_reset_exit, .platform_reset_exit = tegra_sdhci_reset_exit,
}; };

45
drivers/mmc/host/sdhci.c
View File

@ -1413,6 +1413,27 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
} }
void sdhci_set_bus_width(struct sdhci_host *host, int width)
{
u8 ctrl;
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
if (width == MMC_BUS_WIDTH_8) {
ctrl &= ~SDHCI_CTRL_4BITBUS;
if (host->version >= SDHCI_SPEC_300)
ctrl |= SDHCI_CTRL_8BITBUS;
} else {
if (host->version >= SDHCI_SPEC_300)
ctrl &= ~SDHCI_CTRL_8BITBUS;
if (width == MMC_BUS_WIDTH_4)
ctrl |= SDHCI_CTRL_4BITBUS;
else
ctrl &= ~SDHCI_CTRL_4BITBUS;
}
sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
}
EXPORT_SYMBOL_GPL(sdhci_set_bus_width);
static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
{ {
unsigned long flags; unsigned long flags;
@ -1458,29 +1479,7 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
if (host->ops->platform_send_init_74_clocks) if (host->ops->platform_send_init_74_clocks)
host->ops->platform_send_init_74_clocks(host, ios->power_mode); host->ops->platform_send_init_74_clocks(host, ios->power_mode);
/* host->ops->set_bus_width(host, ios->bus_width);
* If your platform has 8-bit width support but is not a v3 controller,
* or if it requires special setup code, you should implement that in
* platform_bus_width().
*/
if (host->ops->platform_bus_width) {
host->ops->platform_bus_width(host, ios->bus_width);
} else {
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
if (ios->bus_width == MMC_BUS_WIDTH_8) {
ctrl &= ~SDHCI_CTRL_4BITBUS;
if (host->version >= SDHCI_SPEC_300)
ctrl |= SDHCI_CTRL_8BITBUS;
} else {
if (host->version >= SDHCI_SPEC_300)
ctrl &= ~SDHCI_CTRL_8BITBUS;
if (ios->bus_width == MMC_BUS_WIDTH_4)
ctrl |= SDHCI_CTRL_4BITBUS;
else
ctrl &= ~SDHCI_CTRL_4BITBUS;
}
sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
}
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);

5
drivers/mmc/host/sdhci.h
View File

@ -281,8 +281,7 @@ struct sdhci_ops {
unsigned int (*get_max_clock)(struct sdhci_host *host); unsigned int (*get_max_clock)(struct sdhci_host *host);
unsigned int (*get_min_clock)(struct sdhci_host *host); unsigned int (*get_min_clock)(struct sdhci_host *host);
unsigned int (*get_timeout_clock)(struct sdhci_host *host); unsigned int (*get_timeout_clock)(struct sdhci_host *host);
int (*platform_bus_width)(struct sdhci_host *host, void (*set_bus_width)(struct sdhci_host *host, int width);
int width);
void (*platform_send_init_74_clocks)(struct sdhci_host *host, void (*platform_send_init_74_clocks)(struct sdhci_host *host,
u8 power_mode); u8 power_mode);
unsigned int (*get_ro)(struct sdhci_host *host); unsigned int (*get_ro)(struct sdhci_host *host);
@ -402,6 +401,8 @@ static inline bool sdhci_sdio_irq_enabled(struct sdhci_host *host)
return !!(host->flags & SDHCI_SDIO_IRQ_ENABLED); return !!(host->flags & SDHCI_SDIO_IRQ_ENABLED);
} }
void sdhci_set_bus_width(struct sdhci_host *host, int width);
#ifdef CONFIG_PM #ifdef CONFIG_PM
extern int sdhci_suspend_host(struct sdhci_host *host); extern int sdhci_suspend_host(struct sdhci_host *host);
extern int sdhci_resume_host(struct sdhci_host *host); extern int sdhci_resume_host(struct sdhci_host *host);