davinci: RMII support for DA850/OMAP-L138 EVM
DA850/OMAP-L138 EVM has a RMII Ethernet PHY on the UI daughter card. The PHY is enabled by proper programming of the IO Expander (TCA6416) ports. Also for RMII PHY to work, the MDIO clock of MII PHY has to be disabled since both the PHYs have the same address. This is done via the GPIO2[6] pin. This patch adds support for RMII PHY. This patch also adds a menuconfig option to select one or no peripheral connected to expander. Currently, sub-options in this menu are RMII and no peripheral.This menuconfig option is similar to the one present for UI card on DA830/OMAP-L137 EVM. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Chaithrika U S
Kevin Hilman
parent
75e2ea643f
commit
2206771c43
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@ -130,6 +130,37 @@ config MACH_DAVINCI_DA850_EVM
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help
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Say Y here to select the TI DA850/OMAP-L138 Evaluation Module.
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config DA850_UI_EXP
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bool "DA850/OMAP-L138 UI (User Interface) board expander configuration"
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depends on MACH_DAVINCI_DA850_EVM
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select GPIO_PCA953X
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help
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Say Y here if you have the DA850/OMAP-L138 UI
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(User Interface) board installed and you want to
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enable the peripherals located on User Interface
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board contorlled by TCA6416 expander.
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choice
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prompt "Select peripherals connected to expander on UI board"
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depends on DA850_UI_EXP
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config DA850_UI_NONE
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bool "No peripheral is enabled"
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help
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Say Y if you do not want to enable any of the peripherals connected
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to TCA6416 expander on DA850/OMAP-L138 EVM UI card
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config DA850_UI_RMII
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bool "RMII Ethernet PHY"
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help
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Say Y if you want to use the RMII PHY on the DA850/OMAP-L138 EVM.
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This PHY is found on the UI daughter card that is supplied with
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the EVM.
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NOTE: Please take care while choosing this option, MII PHY will
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not be functional if RMII mode is selected.
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endchoice
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config DAVINCI_MUX
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bool "DAVINCI multiplexing support"
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depends on ARCH_DAVINCI
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@ -45,6 +45,8 @@
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#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
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#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
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#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
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static struct mtd_partition da850_evm_norflash_partition[] = {
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{
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.name = "NOR filesystem",
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@ -152,6 +154,7 @@ static void da850_evm_setup_nor_nand(void);
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static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
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unsigned ngpio, void *c)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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int sel_a, sel_b, sel_c, ret;
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sel_a = gpio + 7;
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@ -186,6 +189,10 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
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da850_evm_setup_nor_nand();
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if (soc_info->emac_pdata->rmii_en)
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/* enable RMII */
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gpio_set_value(sel_a, 0);
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return 0;
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exp_setup_selc_fail:
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@ -509,6 +516,58 @@ static const short da850_evm_lcdc_pins[] = {
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-1
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};
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static int __init da850_evm_config_emac(u8 rmii_en)
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{
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void __iomem *cfg_chip3_base;
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int ret;
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u32 val;
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cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
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/* configure the CFGCHIP3 register for RMII or MII */
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val = __raw_readl(cfg_chip3_base);
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if (rmii_en)
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val |= BIT(8);
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else
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val &= ~BIT(8);
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__raw_writel(val, cfg_chip3_base);
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if (!rmii_en)
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ret = da8xx_pinmux_setup(da850_cpgmac_pins);
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else
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ret = da8xx_pinmux_setup(da850_rmii_pins);
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if (ret)
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pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
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ret);
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ret = davinci_cfg_reg(DA850_GPIO2_6);
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if (ret)
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pr_warning("da850_evm_init:GPIO(2,6) mux setup "
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"failed\n");
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ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
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if (ret) {
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pr_warning("Cannot open GPIO %d\n",
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DA850_MII_MDIO_CLKEN_PIN);
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return ret;
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}
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if (rmii_en) {
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/* Disable MII MDIO clock */
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gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 1);
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pr_info("EMAC: RMII PHY configured, MII PHY will not be"
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" functional\n");
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} else {
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/* Enable MII MDIO clock */
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gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
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pr_info("EMAC: MII PHY configured, RMII PHY will not be"
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" functional\n");
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}
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return 0;
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}
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static __init void da850_evm_init(void)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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@ -536,12 +595,15 @@ static __init void da850_evm_init(void)
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soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
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soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
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#ifdef CONFIG_DA850_UI_RMII
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soc_info->emac_pdata->rmii_en = 1;
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#else
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soc_info->emac_pdata->rmii_en = 0;
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#endif
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ret = da8xx_pinmux_setup(da850_cpgmac_pins);
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ret = da850_evm_config_emac(soc_info->emac_pdata->rmii_en);
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if (ret)
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pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n",
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ret);
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pr_warning("da850_evm_init: emac setup failed: %d\n", ret);
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ret = da8xx_register_emac();
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if (ret)
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@ -422,6 +422,14 @@ static const struct mux_config da850_pins[] = {
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MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false)
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MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false)
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MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false)
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MUX_CFG(DA850, RMII_TXD_0, 14, 12, 15, 8, false)
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MUX_CFG(DA850, RMII_TXD_1, 14, 8, 15, 8, false)
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MUX_CFG(DA850, RMII_TXEN, 14, 16, 15, 8, false)
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MUX_CFG(DA850, RMII_CRS_DV, 15, 4, 15, 8, false)
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MUX_CFG(DA850, RMII_RXD_0, 14, 24, 15, 8, false)
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MUX_CFG(DA850, RMII_RXD_1, 14, 20, 15, 8, false)
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MUX_CFG(DA850, RMII_RXER, 14, 28, 15, 8, false)
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MUX_CFG(DA850, RMII_MHZ_50_CLK, 15, 0, 15, 0, false)
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/* McASP function */
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MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false)
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MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false)
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@ -524,6 +532,7 @@ static const struct mux_config da850_pins[] = {
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MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
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MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
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/* GPIO function */
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MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false)
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MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false)
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MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
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MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false)
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@ -565,6 +574,14 @@ const short da850_cpgmac_pins[] __initdata = {
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-1
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};
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const short da850_rmii_pins[] __initdata = {
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DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
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DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
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DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
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DA850_MDIO_D,
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-1
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};
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const short da850_mcasp_pins[] __initdata = {
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DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
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DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
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@ -124,6 +124,7 @@ extern const short da850_uart2_pins[];
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extern const short da850_i2c0_pins[];
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extern const short da850_i2c1_pins[];
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extern const short da850_cpgmac_pins[];
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extern const short da850_rmii_pins[];
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extern const short da850_mcasp_pins[];
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extern const short da850_lcdcntl_pins[];
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extern const short da850_mmcsd0_pins[];
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@ -774,6 +774,14 @@ enum davinci_da850_index {
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DA850_MII_RXD_0,
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DA850_MDIO_CLK,
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DA850_MDIO_D,
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DA850_RMII_TXD_0,
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DA850_RMII_TXD_1,
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DA850_RMII_TXEN,
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DA850_RMII_CRS_DV,
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DA850_RMII_RXD_0,
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DA850_RMII_RXD_1,
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DA850_RMII_RXER,
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DA850_RMII_MHZ_50_CLK,
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/* McASP function */
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DA850_ACLKR,
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@ -881,6 +889,7 @@ enum davinci_da850_index {
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DA850_NEMA_CS_2,
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/* GPIO function */
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DA850_GPIO2_6,
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DA850_GPIO2_8,
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DA850_GPIO2_15,
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DA850_GPIO4_0,
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