Two fixes for v4.17-rc cycle
Fix a build regression with split object directories reported by Russell and fix range sizes for omap4 cm2 and prm modules. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlraJXYRHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXNV5g//Y7bnLVOPGTu73EiB4erJr6OHlZjtzBE/ O/QQ0UwHZvmugzztPAfEvJg+s2O9IT6nloxupJHtmGpE43b7Bz47z7PAqSaI10vT 9CJ9xwmRyobkAPnYc9deQpQwmsg4pOYFjtsFTzWB/88AgadhqjRDzIjwGIM1SDvN EKxcS+LA33erebbpgiLAIf+4IGvu+meENEHxBYIA/5KLdcYUTw0dVXSkpR301iV6 R4wW5a1nrqac8HORu+CBmehs0VI3YMJw9tMcIrWDm//ZsPVoXGP61kM6lZxlCB0S FbOMVGO7GmcdrdhY0BaAKa7/KqSXEVBjPtZjZdOlnCDq1YNoUvrpIGn+k5x2jt1d NI03+FaCVqAVGWQ11UywnM55aAmLDYMkY3kUG6HySJL8zKw8m0xGHVFN8JgLI1JU ag3JlCbd7WNkAffLgUO+fobta6P0ASaxBXQ+88aOh9Yp6evuHBLVd/maC1+qNp7I YEVw5HupVpCukPlNmSVpypH9+vfVdRcmrxGZiCoskmwoW+8JnmvPWjsvulFc1nqh 89lnz0XAMzHOTOmaK93s+kiJlZDoKJgrDs9B20Jtunur6El7oChR+f5z/AVmNfMr zessucoRlQ2u4kYMqw/oDKoyE6bkWXhwFB5vjZaz8kXE5HGWF0HCVTnmBF79H/9B C8Nx3K9FNyA= =5SNP -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Pull "Two fixes for v4.17-rc cycle" from Tony Lindgren: Fix a build regression with split object directories reported by Russell and fix range sizes for omap4 cm2 and prm modules. * tag 'omap-for-v4.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Fix build when using split object directories ARM: dts: Fix cm2 and prm sizes for omap4
This commit is contained in:
commit
21f2db5c73
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@ -163,10 +163,10 @@
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cm2: cm2@8000 {
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compatible = "ti,omap4-cm2", "simple-bus";
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reg = <0x8000 0x3000>;
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reg = <0x8000 0x2000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x8000 0x3000>;
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ranges = <0 0x8000 0x2000>;
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cm2_clocks: clocks {
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#address-cells = <1>;
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@ -250,11 +250,11 @@
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prm: prm@6000 {
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compatible = "ti,omap4-prm";
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reg = <0x6000 0x3000>;
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reg = <0x6000 0x2000>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x6000 0x3000>;
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ranges = <0 0x6000 0x2000>;
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prm_clocks: clocks {
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#address-cells = <1>;
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@ -243,8 +243,4 @@ arch/arm/mach-omap2/pm-asm-offsets.s: arch/arm/mach-omap2/pm-asm-offsets.c
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include/generated/ti-pm-asm-offsets.h: arch/arm/mach-omap2/pm-asm-offsets.s FORCE
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$(call filechk,offsets,__TI_PM_ASM_OFFSETS_H__)
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# For rule to generate ti-emif-asm-offsets.h dependency
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include drivers/memory/Makefile.asm-offsets
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arch/arm/mach-omap2/sleep33xx.o: include/generated/ti-pm-asm-offsets.h include/generated/ti-emif-asm-offsets.h
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arch/arm/mach-omap2/sleep43xx.o: include/generated/ti-pm-asm-offsets.h include/generated/ti-emif-asm-offsets.h
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$(obj)/sleep33xx.o $(obj)/sleep43xx.o: include/generated/ti-pm-asm-offsets.h
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@ -7,9 +7,12 @@
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#include <linux/kbuild.h>
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#include <linux/platform_data/pm33xx.h>
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#include <linux/ti-emif-sram.h>
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int main(void)
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{
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ti_emif_asm_offsets();
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DEFINE(AMX3_PM_WFI_FLAGS_OFFSET,
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offsetof(struct am33xx_pm_sram_data, wfi_flags));
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DEFINE(AMX3_PM_L2_AUX_CTRL_VAL_OFFSET,
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@ -6,7 +6,6 @@
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* Dave Gerlach, Vaibhav Bedia
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*/
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#include <generated/ti-emif-asm-offsets.h>
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#include <generated/ti-pm-asm-offsets.h>
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#include <linux/linkage.h>
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#include <linux/ti-emif-sram.h>
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@ -6,7 +6,6 @@
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* Dave Gerlach, Vaibhav Bedia
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*/
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#include <generated/ti-emif-asm-offsets.h>
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#include <generated/ti-pm-asm-offsets.h>
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#include <linux/linkage.h>
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#include <linux/ti-emif-sram.h>
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@ -16,77 +16,7 @@
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int main(void)
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{
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DEFINE(EMIF_SDCFG_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_sdcfg_val));
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DEFINE(EMIF_TIMING1_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_timing1_val));
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DEFINE(EMIF_TIMING2_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_timing2_val));
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DEFINE(EMIF_TIMING3_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_timing3_val));
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DEFINE(EMIF_REF_CTRL_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ref_ctrl_val));
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DEFINE(EMIF_ZQCFG_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_zqcfg_val));
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DEFINE(EMIF_PMCR_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_pmcr_val));
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DEFINE(EMIF_PMCR_SHDW_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val));
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DEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl));
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DEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET,
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offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh));
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DEFINE(EMIF_COS_CONFIG_OFFSET,
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offsetof(struct emif_regs_amx3, emif_cos_config));
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DEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET,
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offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping));
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DEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET,
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offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map));
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DEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET,
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offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map));
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DEFINE(EMIF_OCP_CONFIG_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ocp_config_val));
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DEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET,
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offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim));
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DEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET,
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offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw));
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DEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val));
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DEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET,
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offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw));
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DEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1));
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DEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals));
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DEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3));
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BLANK();
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DEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET,
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offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt));
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DEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET,
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offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys));
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DEFINE(EMIF_PM_CONFIG_OFFSET,
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offsetof(struct ti_emif_pm_data, ti_emif_sram_config));
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DEFINE(EMIF_PM_REGS_VIRT_OFFSET,
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offsetof(struct ti_emif_pm_data, regs_virt));
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DEFINE(EMIF_PM_REGS_PHYS_OFFSET,
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offsetof(struct ti_emif_pm_data, regs_phys));
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DEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data));
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BLANK();
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DEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET,
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offsetof(struct ti_emif_pm_functions, save_context));
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DEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET,
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offsetof(struct ti_emif_pm_functions, restore_context));
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DEFINE(EMIF_PM_ENTER_SR_OFFSET,
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offsetof(struct ti_emif_pm_functions, enter_sr));
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DEFINE(EMIF_PM_EXIT_SR_OFFSET,
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offsetof(struct ti_emif_pm_functions, exit_sr));
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DEFINE(EMIF_PM_ABORT_SR_OFFSET,
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offsetof(struct ti_emif_pm_functions, abort_sr));
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DEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions));
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ti_emif_asm_offsets();
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return 0;
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}
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@ -60,6 +60,81 @@ struct ti_emif_pm_functions {
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u32 abort_sr;
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} __packed __aligned(8);
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static inline void ti_emif_asm_offsets(void)
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{
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DEFINE(EMIF_SDCFG_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_sdcfg_val));
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DEFINE(EMIF_TIMING1_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_timing1_val));
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DEFINE(EMIF_TIMING2_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_timing2_val));
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DEFINE(EMIF_TIMING3_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_timing3_val));
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DEFINE(EMIF_REF_CTRL_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ref_ctrl_val));
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DEFINE(EMIF_ZQCFG_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_zqcfg_val));
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DEFINE(EMIF_PMCR_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_pmcr_val));
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DEFINE(EMIF_PMCR_SHDW_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val));
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DEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl));
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DEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET,
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offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh));
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DEFINE(EMIF_COS_CONFIG_OFFSET,
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offsetof(struct emif_regs_amx3, emif_cos_config));
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DEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET,
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offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping));
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DEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET,
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offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map));
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DEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET,
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offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map));
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DEFINE(EMIF_OCP_CONFIG_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ocp_config_val));
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DEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET,
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offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim));
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DEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET,
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offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw));
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DEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET,
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offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val));
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DEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET,
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offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw));
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DEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1));
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DEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET,
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offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals));
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DEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3));
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BLANK();
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DEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET,
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offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt));
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DEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET,
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offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys));
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DEFINE(EMIF_PM_CONFIG_OFFSET,
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offsetof(struct ti_emif_pm_data, ti_emif_sram_config));
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DEFINE(EMIF_PM_REGS_VIRT_OFFSET,
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offsetof(struct ti_emif_pm_data, regs_virt));
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DEFINE(EMIF_PM_REGS_PHYS_OFFSET,
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offsetof(struct ti_emif_pm_data, regs_phys));
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DEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data));
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BLANK();
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DEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET,
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offsetof(struct ti_emif_pm_functions, save_context));
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DEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET,
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offsetof(struct ti_emif_pm_functions, restore_context));
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DEFINE(EMIF_PM_ENTER_SR_OFFSET,
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offsetof(struct ti_emif_pm_functions, enter_sr));
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DEFINE(EMIF_PM_EXIT_SR_OFFSET,
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offsetof(struct ti_emif_pm_functions, exit_sr));
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DEFINE(EMIF_PM_ABORT_SR_OFFSET,
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offsetof(struct ti_emif_pm_functions, abort_sr));
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DEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions));
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}
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struct gen_pool;
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int ti_emif_copy_pm_function_table(struct gen_pool *sram_pool, void *dst);
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