Merge git://git.infradead.org/users/willy/linux-nvme
Pull NVMe driver fixes from Matthew Wilcox: "Now that actual hardware has been released (don't have any yet myself), people are starting to want some of these fixes merged." Willy doesn't have hardware? Guys... * git://git.infradead.org/users/willy/linux-nvme: NVMe: Cancel outstanding IOs on queue deletion NVMe: Free admin queue memory on initialisation failure NVMe: Use ida for nvme device instance NVMe: Fix whitespace damage in nvme_init NVMe: handle allocation failure in nvme_map_user_pages() NVMe: Fix uninitialized iod compiler warning NVMe: Do not set IO queue depth beyond device max NVMe: Set block queue max sectors NVMe: use namespace id for nvme_get_features NVMe: replace nvme_ns with nvme_dev for user admin NVMe: Fix nvme module init when nvme_major is set NVMe: Set request queue logical block size
This commit is contained in:
commit
21e98932dc
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@ -79,6 +79,7 @@ struct nvme_dev {
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char serial[20];
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char model[40];
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char firmware_rev[8];
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u32 max_hw_sectors;
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};
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/*
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@ -835,15 +836,15 @@ static int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
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}
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static int nvme_get_features(struct nvme_dev *dev, unsigned fid,
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unsigned dword11, dma_addr_t dma_addr)
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unsigned nsid, dma_addr_t dma_addr)
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{
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struct nvme_command c;
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memset(&c, 0, sizeof(c));
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c.features.opcode = nvme_admin_get_features;
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c.features.nsid = cpu_to_le32(nsid);
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c.features.prp1 = cpu_to_le64(dma_addr);
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c.features.fid = cpu_to_le32(fid);
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c.features.dword11 = cpu_to_le32(dword11);
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return nvme_submit_admin_cmd(dev, &c, NULL);
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}
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@ -862,11 +863,51 @@ static int nvme_set_features(struct nvme_dev *dev, unsigned fid,
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return nvme_submit_admin_cmd(dev, &c, result);
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}
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/**
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* nvme_cancel_ios - Cancel outstanding I/Os
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* @queue: The queue to cancel I/Os on
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* @timeout: True to only cancel I/Os which have timed out
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*/
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static void nvme_cancel_ios(struct nvme_queue *nvmeq, bool timeout)
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{
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int depth = nvmeq->q_depth - 1;
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struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
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unsigned long now = jiffies;
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int cmdid;
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for_each_set_bit(cmdid, nvmeq->cmdid_data, depth) {
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void *ctx;
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nvme_completion_fn fn;
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static struct nvme_completion cqe = {
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.status = cpu_to_le16(NVME_SC_ABORT_REQ) << 1,
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};
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if (timeout && !time_after(now, info[cmdid].timeout))
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continue;
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dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d\n", cmdid);
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ctx = cancel_cmdid(nvmeq, cmdid, &fn);
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fn(nvmeq->dev, ctx, &cqe);
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}
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}
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static void nvme_free_queue_mem(struct nvme_queue *nvmeq)
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{
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dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
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(void *)nvmeq->cqes, nvmeq->cq_dma_addr);
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dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
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nvmeq->sq_cmds, nvmeq->sq_dma_addr);
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kfree(nvmeq);
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}
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static void nvme_free_queue(struct nvme_dev *dev, int qid)
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{
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struct nvme_queue *nvmeq = dev->queues[qid];
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int vector = dev->entry[nvmeq->cq_vector].vector;
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spin_lock_irq(&nvmeq->q_lock);
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nvme_cancel_ios(nvmeq, false);
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spin_unlock_irq(&nvmeq->q_lock);
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irq_set_affinity_hint(vector, NULL);
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free_irq(vector, nvmeq);
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@ -876,18 +917,15 @@ static void nvme_free_queue(struct nvme_dev *dev, int qid)
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adapter_delete_cq(dev, qid);
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}
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dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
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(void *)nvmeq->cqes, nvmeq->cq_dma_addr);
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dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
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nvmeq->sq_cmds, nvmeq->sq_dma_addr);
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kfree(nvmeq);
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nvme_free_queue_mem(nvmeq);
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}
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static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
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int depth, int vector)
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{
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struct device *dmadev = &dev->pci_dev->dev;
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unsigned extra = (depth / 8) + (depth * sizeof(struct nvme_cmd_info));
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unsigned extra = DIV_ROUND_UP(depth, 8) + (depth *
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sizeof(struct nvme_cmd_info));
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struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
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if (!nvmeq)
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return NULL;
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@ -975,7 +1013,7 @@ static __devinit struct nvme_queue *nvme_create_queue(struct nvme_dev *dev,
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static int __devinit nvme_configure_admin_queue(struct nvme_dev *dev)
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{
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int result;
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int result = 0;
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u32 aqa;
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u64 cap;
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unsigned long timeout;
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@ -1005,17 +1043,22 @@ static int __devinit nvme_configure_admin_queue(struct nvme_dev *dev)
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timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
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dev->db_stride = NVME_CAP_STRIDE(cap);
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while (!(readl(&dev->bar->csts) & NVME_CSTS_RDY)) {
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while (!result && !(readl(&dev->bar->csts) & NVME_CSTS_RDY)) {
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msleep(100);
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if (fatal_signal_pending(current))
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return -EINTR;
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result = -EINTR;
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if (time_after(jiffies, timeout)) {
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dev_err(&dev->pci_dev->dev,
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"Device not ready; aborting initialisation\n");
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return -ENODEV;
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result = -ENODEV;
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}
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}
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if (result) {
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nvme_free_queue_mem(nvmeq);
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return result;
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}
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result = queue_request_irq(dev, nvmeq, "nvme admin");
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dev->queues[0] = nvmeq;
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return result;
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@ -1037,6 +1080,8 @@ static struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
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offset = offset_in_page(addr);
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count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
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pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
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if (!pages)
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return ERR_PTR(-ENOMEM);
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err = get_user_pages_fast(addr, count, 1, pages);
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if (err < count) {
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@ -1146,14 +1191,13 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
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return status;
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}
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static int nvme_user_admin_cmd(struct nvme_ns *ns,
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static int nvme_user_admin_cmd(struct nvme_dev *dev,
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struct nvme_admin_cmd __user *ucmd)
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{
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struct nvme_dev *dev = ns->dev;
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struct nvme_admin_cmd cmd;
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struct nvme_command c;
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int status, length;
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struct nvme_iod *iod;
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struct nvme_iod *uninitialized_var(iod);
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if (!capable(CAP_SYS_ADMIN))
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return -EACCES;
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case NVME_IOCTL_ID:
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return ns->ns_id;
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case NVME_IOCTL_ADMIN_CMD:
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return nvme_user_admin_cmd(ns, (void __user *)arg);
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return nvme_user_admin_cmd(ns->dev, (void __user *)arg);
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case NVME_IOCTL_SUBMIT_IO:
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return nvme_submit_io(ns, (void __user *)arg);
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default:
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@ -1218,26 +1262,6 @@ static const struct block_device_operations nvme_fops = {
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.compat_ioctl = nvme_ioctl,
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};
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static void nvme_timeout_ios(struct nvme_queue *nvmeq)
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{
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int depth = nvmeq->q_depth - 1;
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struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
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unsigned long now = jiffies;
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int cmdid;
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for_each_set_bit(cmdid, nvmeq->cmdid_data, depth) {
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void *ctx;
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nvme_completion_fn fn;
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static struct nvme_completion cqe = { .status = cpu_to_le16(NVME_SC_ABORT_REQ) << 1, };
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if (!time_after(now, info[cmdid].timeout))
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continue;
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dev_warn(nvmeq->q_dmadev, "Timing out I/O %d\n", cmdid);
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ctx = cancel_cmdid(nvmeq, cmdid, &fn);
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fn(nvmeq->dev, ctx, &cqe);
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}
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}
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static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
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{
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while (bio_list_peek(&nvmeq->sq_cong)) {
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@ -1269,7 +1293,7 @@ static int nvme_kthread(void *data)
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spin_lock_irq(&nvmeq->q_lock);
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if (nvme_process_cq(nvmeq))
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printk("process_cq did something\n");
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nvme_timeout_ios(nvmeq);
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nvme_cancel_ios(nvmeq, true);
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nvme_resubmit_bios(nvmeq);
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spin_unlock_irq(&nvmeq->q_lock);
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}
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@ -1339,6 +1363,9 @@ static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, int nsid,
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ns->disk = disk;
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lbaf = id->flbas & 0xf;
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ns->lba_shift = id->lbaf[lbaf].ds;
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blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
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if (dev->max_hw_sectors)
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blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
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disk->major = nvme_major;
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disk->minors = NVME_MINORS;
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@ -1383,7 +1410,7 @@ static int set_queue_count(struct nvme_dev *dev, int count)
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static int __devinit nvme_setup_io_queues(struct nvme_dev *dev)
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{
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int result, cpu, i, nr_io_queues, db_bar_size;
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int result, cpu, i, nr_io_queues, db_bar_size, q_depth;
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nr_io_queues = num_online_cpus();
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result = set_queue_count(dev, nr_io_queues);
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cpu = cpumask_next(cpu, cpu_online_mask);
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}
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q_depth = min_t(int, NVME_CAP_MQES(readq(&dev->bar->cap)) + 1,
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NVME_Q_DEPTH);
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for (i = 0; i < nr_io_queues; i++) {
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dev->queues[i + 1] = nvme_create_queue(dev, i + 1,
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NVME_Q_DEPTH, i);
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dev->queues[i + 1] = nvme_create_queue(dev, i + 1, q_depth, i);
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if (IS_ERR(dev->queues[i + 1]))
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return PTR_ERR(dev->queues[i + 1]);
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dev->queue_count++;
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@ -1480,6 +1508,10 @@ static int __devinit nvme_dev_add(struct nvme_dev *dev)
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memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
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memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
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memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
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if (ctrl->mdts) {
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int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
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dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
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}
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id_ns = mem;
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for (i = 1; i <= nn; i++) {
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@ -1523,8 +1555,6 @@ static int nvme_dev_remove(struct nvme_dev *dev)
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list_del(&dev->node);
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spin_unlock(&dev_list_lock);
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/* TODO: wait all I/O finished or cancel them */
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list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
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list_del(&ns->list);
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del_gendisk(ns->disk);
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@ -1560,15 +1590,33 @@ static void nvme_release_prp_pools(struct nvme_dev *dev)
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dma_pool_destroy(dev->prp_small_pool);
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}
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/* XXX: Use an ida or something to let remove / add work correctly */
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static void nvme_set_instance(struct nvme_dev *dev)
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static DEFINE_IDA(nvme_instance_ida);
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static int nvme_set_instance(struct nvme_dev *dev)
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{
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static int instance;
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dev->instance = instance++;
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int instance, error;
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do {
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if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
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return -ENODEV;
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spin_lock(&dev_list_lock);
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error = ida_get_new(&nvme_instance_ida, &instance);
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spin_unlock(&dev_list_lock);
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} while (error == -EAGAIN);
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if (error)
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return -ENODEV;
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dev->instance = instance;
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return 0;
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}
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static void nvme_release_instance(struct nvme_dev *dev)
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{
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spin_lock(&dev_list_lock);
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ida_remove(&nvme_instance_ida, dev->instance);
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spin_unlock(&dev_list_lock);
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}
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static int __devinit nvme_probe(struct pci_dev *pdev,
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@ -1601,7 +1649,10 @@ static int __devinit nvme_probe(struct pci_dev *pdev,
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pci_set_drvdata(pdev, dev);
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dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
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dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
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nvme_set_instance(dev);
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result = nvme_set_instance(dev);
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if (result)
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goto disable;
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dev->entry[0].vector = pdev->irq;
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result = nvme_setup_prp_pools(dev);
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@ -1704,15 +1755,17 @@ static struct pci_driver nvme_driver = {
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static int __init nvme_init(void)
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{
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int result = -EBUSY;
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int result;
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nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
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if (IS_ERR(nvme_thread))
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return PTR_ERR(nvme_thread);
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nvme_major = register_blkdev(nvme_major, "nvme");
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if (nvme_major <= 0)
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result = register_blkdev(nvme_major, "nvme");
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if (result < 0)
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goto kill_kthread;
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else if (result > 0)
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nvme_major = result;
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result = pci_register_driver(&nvme_driver);
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if (result)
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@ -35,8 +35,10 @@ struct nvme_bar {
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__u64 acq; /* Admin CQ Base Address */
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};
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#define NVME_CAP_MQES(cap) ((cap) & 0xffff)
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#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
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#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
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#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
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enum {
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NVME_CC_ENABLE = 1 << 0,
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