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nios2: Fix update_mmu_cache preload the TLB with the new PTE 

There is a bug in the TLB preload caused by the pid not being
shifted to the correct location in tlbmisc register.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Nicholas Piggin 2019-03-07 05:28:31 +08:00 committed by Ley Foon Tan
parent 3ac23944de
commit 21e6bff5e0
1 changed files with 2 additions and 1 deletions
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3
arch/nios2/mm/tlb.c
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@ -70,7 +70,8 @@ static void replace_tlb_one_pid(unsigned long addr, unsigned long mmu_pid, unsig
if (pid != mmu_pid)
continue;
tlbmisc = mmu_pid | TLBMISC_WE | (way << TLBMISC_WAY_SHIFT);
tlbmisc = (mmu_pid << TLBMISC_PID_SHIFT) | TLBMISC_WE |
(way << TLBMISC_WAY_SHIFT);
WRCTL(CTL_TLBMISC, tlbmisc);
if (tlbacc == 0)
WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));