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gpio fixes for v3.6-rc1 

- Fix a resource leak in the SCH driver
 - Fix the register address calculation in the MSIC driver
 - Fix the PXA driver's devicetree functions
 - Delete redundant shadow variable leftovers in the MXC driver
 - Specify the GPIO base for the device tree probe in the MXC driver
 - Add a modalias for the i.MX driver
 - Fix off-by-one bug in the Samsung driver
 - Fix erroneous errorpath in the Langwell driver
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Merge tag 'gpio-fixes-v3.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull gpio fixes from Linus Walleij:
 - Fix a resource leak in the SCH driver
 - Fix the register address calculation in the MSIC driver
 - Fix the PXA driver's devicetree functions
 - Delete redundant shadow variable leftovers in the MXC driver
 - Specify the GPIO base for the device tree probe in the MXC driver
 - Add a modalias for the i.MX driver
 - Fix off-by-one bug in the Samsung driver
 - Fix erroneous errorpath in the Langwell driver

* tag 'gpio-fixes-v3.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
  drivers/gpio/gpio-langwell.c: fix error return code
  gpio: samsung: Fix off-by-one bug in gpio addresses
  ARM: dts: imx: add alias for gpio
  gpio/mxc: specify gpio base for device tree probe
  gpio/mxc: remove redundant shadow variables initialization
  GPIO: gpio-pxa: fix devicetree functions
  gpio: msic: Fix calculating register address in msic_gpio_to_oreg()
  gpio-sch: Fix leak of resource
This commit is contained in:
Linus Torvalds 2012-08-12 21:45:33 +03:00
parent c8dfbf48d3 d6a2b7ba67
commit 21d2f8dc91
10 changed files with 67 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/imx27.dtsi
View File

@ -19,6 +19,12 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
gpio5 = &gpio6;
};
avic: avic-interrupt-controller@e0000000 {

4
arch/arm/boot/dts/imx51.dtsi
View File

@ -17,6 +17,10 @@
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
};
tzic: tz-interrupt-controller@e0000000 {

7
arch/arm/boot/dts/imx53.dtsi
View File

@ -19,6 +19,13 @@
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
gpio5 = &gpio6;
gpio6 = &gpio7;
};
tzic: tz-interrupt-controller@0fffc000 {

7
arch/arm/boot/dts/imx6q.dtsi
View File

@ -19,6 +19,13 @@
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
gpio5 = &gpio6;
gpio6 = &gpio7;
};
cpus {

7
drivers/gpio/gpio-langwell.c
View File

@ -339,7 +339,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
resource_size_t start, len;
struct lnw_gpio *lnw;
u32 gpio_base;
int retval = 0;
int retval;
int ngpio = id->driver_data;
retval = pci_enable_device(pdev);
@ -357,6 +357,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
base = ioremap_nocache(start, len);
if (!base) {
dev_err(&pdev->dev, "error mapping bar1\n");
retval = -EFAULT;
goto err3;
}
gpio_base = *((u32 *)base + 1);
@ -381,8 +382,10 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio,
&lnw_gpio_irq_ops, lnw);
if (!lnw->domain)
if (!lnw->domain) {
retval = -ENOMEM;
goto err3;
}
lnw->reg_base = base;
lnw->chip.label = dev_name(&pdev->dev);

2
drivers/gpio/gpio-msic.c
View File

@ -99,7 +99,7 @@ static int msic_gpio_to_oreg(unsigned offset)
if (offset < 20)
return INTEL_MSIC_GPIO0HV0CTLO - offset + 16;
return INTEL_MSIC_GPIO1HV0CTLO + offset + 20;
return INTEL_MSIC_GPIO1HV0CTLO - offset + 20;
}
static int msic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)

5
drivers/gpio/gpio-mxc.c
View File

@ -465,9 +465,8 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
goto out_iounmap;
port->bgc.gc.to_irq = mxc_gpio_to_irq;
port->bgc.gc.base = pdev->id * 32;
port->bgc.dir = port->bgc.read_reg(port->bgc.reg_dir);
port->bgc.data = port->bgc.read_reg(port->bgc.reg_set);
port->bgc.gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :
pdev->id * 32;
err = gpiochip_add(&port->bgc.gc);
if (err)

26
drivers/gpio/gpio-pxa.c
View File

@ -62,6 +62,7 @@ int pxa_last_gpio;
#ifdef CONFIG_OF
static struct irq_domain *domain;
static struct device_node *pxa_gpio_of_node;
#endif
struct pxa_gpio_chip {
@ -277,6 +278,24 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
(value ? GPSR_OFFSET : GPCR_OFFSET));
}
#ifdef CONFIG_OF_GPIO
static int pxa_gpio_of_xlate(struct gpio_chip *gc,
const struct of_phandle_args *gpiospec,
u32 *flags)
{
if (gpiospec->args[0] > pxa_last_gpio)
return -EINVAL;
if (gc != &pxa_gpio_chips[gpiospec->args[0] / 32].chip)
return -EINVAL;
if (flags)
*flags = gpiospec->args[1];
return gpiospec->args[0] % 32;
}
#endif
static int __devinit pxa_init_gpio_chip(int gpio_end,
int (*set_wake)(unsigned int, unsigned int))
{
@ -304,6 +323,11 @@ static int __devinit pxa_init_gpio_chip(int gpio_end,
c->get = pxa_gpio_get;
c->set = pxa_gpio_set;
c->to_irq = pxa_gpio_to_irq;
#ifdef CONFIG_OF_GPIO
c->of_node = pxa_gpio_of_node;
c->of_xlate = pxa_gpio_of_xlate;
c->of_gpio_n_cells = 2;
#endif
/* number of GPIOs on last bank may be less than 32 */
c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
@ -505,6 +529,7 @@ static int pxa_irq_domain_map(struct irq_domain *d, unsigned int irq,
const struct irq_domain_ops pxa_irq_domain_ops = {
.map = pxa_irq_domain_map,
.xlate = irq_domain_xlate_twocell,
};
#ifdef CONFIG_OF
@ -545,6 +570,7 @@ static int __devinit pxa_gpio_probe_dt(struct platform_device *pdev)
}
domain = irq_domain_add_legacy(np, nr_gpios, irq_base, 0,
&pxa_irq_domain_ops, NULL);
pxa_gpio_of_node = np;
return 0;
err:
iounmap(gpio_reg_base);

14
drivers/gpio/gpio-samsung.c
View File

@ -2452,12 +2452,6 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
.ngpio = EXYNOS5_GPIO_C3_NR,
.label = "GPC3",
},
}, {
.chip = {
.base = EXYNOS5_GPC4(0),
.ngpio = EXYNOS5_GPIO_C4_NR,
.label = "GPC4",
},
}, {
.chip = {
.base = EXYNOS5_GPD0(0),
@ -2512,6 +2506,12 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
.ngpio = EXYNOS5_GPIO_Y6_NR,
.label = "GPY6",
},
}, {
.chip = {
.base = EXYNOS5_GPC4(0),
.ngpio = EXYNOS5_GPIO_C4_NR,
.label = "GPC4",
},
}, {
.config = &samsung_gpio_cfgs[9],
.irq_base = IRQ_EINT(0),
@ -2836,7 +2836,7 @@ static __init void exynos5_gpiolib_init(void)
}
/* need to set base address for gpc4 */
exynos5_gpios_1[11].base = gpio_base1 + 0x2E0;
exynos5_gpios_1[20].base = gpio_base1 + 0x2E0;
/* need to set base address for gpx */
chip = &exynos5_gpios_1[21];

3
drivers/gpio/gpio-sch.c
View File

@ -241,7 +241,8 @@ static int __devinit sch_gpio_probe(struct platform_device *pdev)
break;
default:
return -ENODEV;
err = -ENODEV;
goto err_sch_gpio_core;
}
sch_gpio_core.dev = &pdev->dev;