pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions
This patch adds SDHI{0,1,3} pins, groups and functions to the R8A77990
SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Takeshi Kihara
Geert Uytterhoeven
parent
b06a8b4387
commit
21ac0d58bb
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@ -2549,6 +2549,174 @@ static const unsigned int scif_clk_b_mux[] = {
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SCIF_CLK_B_MARK,
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};
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/* - SDHI0 ------------------------------------------------------------------ */
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static const unsigned int sdhi0_data1_pins[] = {
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/* D0 */
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RCAR_GP_PIN(3, 2),
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};
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static const unsigned int sdhi0_data1_mux[] = {
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SD0_DAT0_MARK,
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};
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static const unsigned int sdhi0_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
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RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
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};
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static const unsigned int sdhi0_data4_mux[] = {
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SD0_DAT0_MARK, SD0_DAT1_MARK,
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SD0_DAT2_MARK, SD0_DAT3_MARK,
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};
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static const unsigned int sdhi0_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
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};
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static const unsigned int sdhi0_ctrl_mux[] = {
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SD0_CLK_MARK, SD0_CMD_MARK,
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};
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static const unsigned int sdhi0_cd_pins[] = {
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/* CD */
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RCAR_GP_PIN(3, 12),
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};
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static const unsigned int sdhi0_cd_mux[] = {
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SD0_CD_MARK,
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};
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static const unsigned int sdhi0_wp_pins[] = {
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/* WP */
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RCAR_GP_PIN(3, 13),
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};
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static const unsigned int sdhi0_wp_mux[] = {
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SD0_WP_MARK,
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};
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/* - SDHI1 ------------------------------------------------------------------ */
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static const unsigned int sdhi1_data1_pins[] = {
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/* D0 */
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RCAR_GP_PIN(3, 8),
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};
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static const unsigned int sdhi1_data1_mux[] = {
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SD1_DAT0_MARK,
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};
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static const unsigned int sdhi1_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
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RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
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};
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static const unsigned int sdhi1_data4_mux[] = {
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SD1_DAT0_MARK, SD1_DAT1_MARK,
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SD1_DAT2_MARK, SD1_DAT3_MARK,
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};
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static const unsigned int sdhi1_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
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};
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static const unsigned int sdhi1_ctrl_mux[] = {
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SD1_CLK_MARK, SD1_CMD_MARK,
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};
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static const unsigned int sdhi1_cd_pins[] = {
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/* CD */
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RCAR_GP_PIN(3, 14),
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};
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static const unsigned int sdhi1_cd_mux[] = {
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SD1_CD_MARK,
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};
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static const unsigned int sdhi1_wp_pins[] = {
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/* WP */
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RCAR_GP_PIN(3, 15),
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};
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static const unsigned int sdhi1_wp_mux[] = {
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SD1_WP_MARK,
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};
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/* - SDHI3 ------------------------------------------------------------------ */
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static const unsigned int sdhi3_data1_pins[] = {
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/* D0 */
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RCAR_GP_PIN(4, 2),
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};
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static const unsigned int sdhi3_data1_mux[] = {
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SD3_DAT0_MARK,
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};
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static const unsigned int sdhi3_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
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RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
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};
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static const unsigned int sdhi3_data4_mux[] = {
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SD3_DAT0_MARK, SD3_DAT1_MARK,
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SD3_DAT2_MARK, SD3_DAT3_MARK,
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};
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static const unsigned int sdhi3_data8_pins[] = {
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/* D[0:7] */
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RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
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RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
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RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 7),
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RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 9),
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};
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static const unsigned int sdhi3_data8_mux[] = {
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SD3_DAT0_MARK, SD3_DAT1_MARK,
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SD3_DAT2_MARK, SD3_DAT3_MARK,
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SD3_DAT4_MARK, SD3_DAT5_MARK,
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SD3_DAT6_MARK, SD3_DAT7_MARK,
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};
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static const unsigned int sdhi3_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
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};
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static const unsigned int sdhi3_ctrl_mux[] = {
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SD3_CLK_MARK, SD3_CMD_MARK,
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};
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static const unsigned int sdhi3_cd_pins[] = {
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/* CD */
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RCAR_GP_PIN(3, 12),
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};
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static const unsigned int sdhi3_cd_mux[] = {
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SD3_CD_MARK,
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};
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static const unsigned int sdhi3_wp_pins[] = {
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/* WP */
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RCAR_GP_PIN(3, 13),
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};
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static const unsigned int sdhi3_wp_mux[] = {
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SD3_WP_MARK,
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};
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static const unsigned int sdhi3_ds_pins[] = {
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/* DS */
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RCAR_GP_PIN(4, 10),
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};
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static const unsigned int sdhi3_ds_mux[] = {
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SD3_DS_MARK,
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};
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/* - SSI -------------------------------------------------------------------- */
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static const unsigned int ssi0_data_pins[] = {
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/* SDATA */
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@ -2787,7 +2955,7 @@ static const unsigned int usb30_id_mux[] = {
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};
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static const struct {
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struct sh_pfc_pin_group common[162];
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struct sh_pfc_pin_group common[179];
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struct sh_pfc_pin_group automotive[0];
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} pinmux_groups = {
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.common = {
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@ -2927,6 +3095,23 @@ static const struct {
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SH_PFC_PIN_GROUP(scif5_data_c),
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SH_PFC_PIN_GROUP(scif_clk_a),
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SH_PFC_PIN_GROUP(scif_clk_b),
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SH_PFC_PIN_GROUP(sdhi0_data1),
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SH_PFC_PIN_GROUP(sdhi0_data4),
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SH_PFC_PIN_GROUP(sdhi0_ctrl),
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SH_PFC_PIN_GROUP(sdhi0_cd),
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SH_PFC_PIN_GROUP(sdhi0_wp),
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SH_PFC_PIN_GROUP(sdhi1_data1),
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SH_PFC_PIN_GROUP(sdhi1_data4),
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SH_PFC_PIN_GROUP(sdhi1_ctrl),
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SH_PFC_PIN_GROUP(sdhi1_cd),
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SH_PFC_PIN_GROUP(sdhi1_wp),
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SH_PFC_PIN_GROUP(sdhi3_data1),
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SH_PFC_PIN_GROUP(sdhi3_data4),
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SH_PFC_PIN_GROUP(sdhi3_data8),
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SH_PFC_PIN_GROUP(sdhi3_ctrl),
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SH_PFC_PIN_GROUP(sdhi3_cd),
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SH_PFC_PIN_GROUP(sdhi3_wp),
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SH_PFC_PIN_GROUP(sdhi3_ds),
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SH_PFC_PIN_GROUP(ssi0_data),
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SH_PFC_PIN_GROUP(ssi01239_ctrl),
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SH_PFC_PIN_GROUP(ssi1_data),
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@ -3176,6 +3361,32 @@ static const char * const scif_clk_groups[] = {
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"scif_clk_b",
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};
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static const char * const sdhi0_groups[] = {
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"sdhi0_data1",
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"sdhi0_data4",
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"sdhi0_ctrl",
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"sdhi0_cd",
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"sdhi0_wp",
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};
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static const char * const sdhi1_groups[] = {
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"sdhi1_data1",
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"sdhi1_data4",
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"sdhi1_ctrl",
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"sdhi1_cd",
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"sdhi1_wp",
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};
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static const char * const sdhi3_groups[] = {
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"sdhi3_data1",
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"sdhi3_data4",
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"sdhi3_data8",
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"sdhi3_ctrl",
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"sdhi3_cd",
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"sdhi3_wp",
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"sdhi3_ds",
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};
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static const char * const ssi_groups[] = {
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"ssi0_data",
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"ssi01239_ctrl",
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@ -3212,7 +3423,7 @@ static const char * const usb30_groups[] = {
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};
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static const struct {
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struct sh_pfc_function common[31];
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struct sh_pfc_function common[34];
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struct sh_pfc_function automotive[0];
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} pinmux_functions = {
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.common = {
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@ -3244,6 +3455,9 @@ static const struct {
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SH_PFC_FUNCTION(scif4),
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SH_PFC_FUNCTION(scif5),
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SH_PFC_FUNCTION(scif_clk),
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SH_PFC_FUNCTION(sdhi0),
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SH_PFC_FUNCTION(sdhi1),
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SH_PFC_FUNCTION(sdhi3),
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SH_PFC_FUNCTION(ssi),
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SH_PFC_FUNCTION(usb0),
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SH_PFC_FUNCTION(usb30),
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