intel_scu_ipc: fix data packing of PMIC command on Moorestown
Data is 2-byte per entry for PMIC read-modify-update command. Signed-off-by: Hong Liu <hong.liu@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Matthew Garrett <mjg@redhat.com>
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@ -154,7 +154,7 @@ static inline int busy_loop(void) /* Wait till scu status is busy */
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/* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */
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static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
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{
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int i, nc, bytes;
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int i, nc, bytes, d;
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u32 offset = 0;
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u32 err = 0;
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u8 cbuf[IPC_WWBUF_SIZE] = { };
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@ -171,15 +171,16 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
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if (platform != MRST_CPU_CHIP_PENWELL) {
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bytes = 0;
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for(i=0; i<count; i++) {
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d = 0;
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for (i = 0; i < count; i++) {
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cbuf[bytes++] = addr[i];
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cbuf[bytes++] = addr[i] >> 8;
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if (id != IPC_CMD_PCNTRL_R)
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cbuf[bytes++] = data[i];
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cbuf[bytes++] = data[d++];
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if (id == IPC_CMD_PCNTRL_M)
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cbuf[bytes++] = data[i + 1];
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cbuf[bytes++] = data[d++];
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}
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for(i=0; i<bytes; i+=4)
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for (i = 0; i < bytes; i += 4)
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ipc_data_writel(wbuf[i/4], i);
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ipc_command(bytes << 16 | id << 12 | 0 << 8 | op);
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} else {
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