mmc: tegra: Power on the calibration pad
Automatic pad drive strength calibration is performed on a separate pad identical to the ones used for driving the actual bus. Power on the calibration pad during the calibration procedure and power it off afterwards to save power. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -54,6 +54,7 @@
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#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL 0x1e0
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#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK 0x0000000f
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#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL 0x7
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#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD BIT(31)
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#define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec
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#define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31)
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@ -238,11 +239,34 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
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tegra_host->ddr_signaling = false;
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}
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static void tegra_sdhci_configure_cal_pad(struct sdhci_host *host, bool enable)
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{
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u32 val;
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/*
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* Enable or disable the additional I/O pad used by the drive strength
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* calibration process.
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*/
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val = sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL);
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if (enable)
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val |= SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD;
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else
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val &= ~SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD;
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sdhci_writel(host, val, SDHCI_TEGRA_SDMEM_COMP_PADCTRL);
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if (enable)
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usleep_range(1, 2);
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}
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static void tegra_sdhci_pad_autocalib(struct sdhci_host *host)
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{
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u32 reg;
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int ret;
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tegra_sdhci_configure_cal_pad(host, true);
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reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG);
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reg |= SDHCI_AUTO_CAL_ENABLE | SDHCI_AUTO_CAL_START;
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sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG);
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@ -253,6 +277,8 @@ static void tegra_sdhci_pad_autocalib(struct sdhci_host *host)
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reg, !(reg & SDHCI_TEGRA_AUTO_CAL_ACTIVE),
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1000, 10000);
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tegra_sdhci_configure_cal_pad(host, false);
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if (ret)
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dev_err(mmc_dev(host->mmc), "Pad autocal timed out\n");
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}
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