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arm64: mm: remove page_mapping check in __sync_icache_dcache 

__sync_icache_dcache unconditionally skips the cache maintenance for
anonymous pages, under the assumption that flushing is only required in
the presence of D-side aliases [see 7249b79f6b ("arm64: Do not flush
the D-cache for anonymous pages")].

Unfortunately, this breaks migration of anonymous pages holding
self-modifying code, where userspace cannot be reasonably expected to
reissue maintenance instructions in response to a migration.

This patch fixes the problem by removing the broken page_mapping(page)
check from the cache syncing code, otherwise we may end up fetching and
executing stale instructions from the PoU.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: <stable@vger.kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Shaokun Zhang 2016-06-21 15:32:57 +08:00 committed by Will Deacon
parent 9ca4e58c20
commit 20c27a4270
1 changed files with 0 additions and 4 deletions
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4
arch/arm64/mm/flush.c
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@ -71,10 +71,6 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr)
{ {
struct page *page = pte_page(pte); struct page *page = pte_page(pte);
/* no flushing needed for anonymous pages */
if (!page_mapping(page))
return;
if (!test_and_set_bit(PG_dcache_clean, &page->flags)) if (!test_and_set_bit(PG_dcache_clean, &page->flags))
sync_icache_aliases(page_address(page), sync_icache_aliases(page_address(page),
PAGE_SIZE << compound_order(page)); PAGE_SIZE << compound_order(page));