ARM: DRA7: Enable Cortex A15 errata 798181

ARM errata 798181 is applicable for OMAP5/DRA7 based devices. So enable
the same in the build.

DRA7xx is based on Cortex-A15 r2p2 revision.

ARM Errata extract and workaround information is as below.

On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
adequately shooting down all use of the old entries. The
ARM_ERRATA_798181 option enables the Linux kernel workaround
for this erratum which sends an IPI to the CPUs that are running
the same ASID as the one being invalidated.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Praneeth Bajjuri 2015-03-25 18:25:09 -05:00 committed by Tony Lindgren
parent d723cfeafc
commit 209431eff8
1 changed files with 1 additions and 0 deletions

View File

@ -69,6 +69,7 @@ config SOC_DRA7XX
select ARM_GIC
select HAVE_ARM_ARCH_TIMER
select IRQ_CROSSBAR
select ARM_ERRATA_798181 if SMP
config ARCH_OMAP2PLUS
bool