ARM: DRA7: Enable Cortex A15 errata 798181
ARM errata 798181 is applicable for OMAP5/DRA7 based devices. So enable the same in the build. DRA7xx is based on Cortex-A15 r2p2 revision. ARM Errata extract and workaround information is as below. On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not adequately shooting down all use of the old entries. The ARM_ERRATA_798181 option enables the Linux kernel workaround for this erratum which sends an IPI to the CPUs that are running the same ASID as the one being invalidated. Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -69,6 +69,7 @@ config SOC_DRA7XX
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select ARM_GIC
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select HAVE_ARM_ARCH_TIMER
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select IRQ_CROSSBAR
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select ARM_ERRATA_798181 if SMP
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config ARCH_OMAP2PLUS
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bool
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