[PATCH] sata_sil: add new constants in preparation for new interrupt handler
sata_sil is about to get a brand new interrupt handler. Add relevant constants. Signed-off-by: Tejun Heo <htejun@gmail.com>
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@ -54,6 +54,7 @@ enum {
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*/
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SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29),
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SIL_FLAG_MOD15WRITE = (1 << 30),
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SIL_DFL_HOST_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
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ATA_FLAG_MMIO,
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@ -84,6 +85,20 @@ enum {
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/* BMDMA/BMDMA2 */
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SIL_INTR_STEERING = (1 << 1),
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SIL_DMA_ENABLE = (1 << 0), /* DMA run switch */
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SIL_DMA_RDWR = (1 << 3), /* DMA Rd-Wr */
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SIL_DMA_SATA_IRQ = (1 << 4), /* OR of all SATA IRQs */
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SIL_DMA_ACTIVE = (1 << 16), /* DMA running */
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SIL_DMA_ERROR = (1 << 17), /* PCI bus error */
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SIL_DMA_COMPLETE = (1 << 18), /* cmd complete / IRQ pending */
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SIL_DMA_N_SATA_IRQ = (1 << 6), /* SATA_IRQ for the next channel */
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SIL_DMA_N_ACTIVE = (1 << 24), /* ACTIVE for the next channel */
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SIL_DMA_N_ERROR = (1 << 25), /* ERROR for the next channel */
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SIL_DMA_N_COMPLETE = (1 << 26), /* COMPLETE for the next channel */
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/* SIEN */
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SIL_SIEN_N = (1 << 16), /* triggered by SError.N */
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/*
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* Others
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*/
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@ -226,6 +241,7 @@ static const struct {
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unsigned long tf; /* ATA taskfile register block */
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unsigned long ctl; /* ATA control/altstatus register block */
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unsigned long bmdma; /* DMA register block */
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unsigned long bmdma2; /* DMA register block #2 */
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unsigned long fifo_cfg; /* FIFO Valid Byte Count and Control */
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unsigned long scr; /* SATA control register block */
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unsigned long sien; /* SATA Interrupt Enable register */
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@ -233,10 +249,10 @@ static const struct {
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unsigned long sfis_cfg; /* SATA FIS reception config register */
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} sil_port[] = {
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/* port 0 ... */
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{ 0x80, 0x8A, 0x00, 0x40, 0x100, 0x148, 0xb4, 0x14c },
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{ 0xC0, 0xCA, 0x08, 0x44, 0x180, 0x1c8, 0xf4, 0x1cc },
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{ 0x280, 0x28A, 0x200, 0x240, 0x300, 0x348, 0x2b4, 0x34c },
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{ 0x2C0, 0x2CA, 0x208, 0x244, 0x380, 0x3c8, 0x2f4, 0x3cc },
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{ 0x80, 0x8A, 0x00, 0x10, 0x40, 0x100, 0x148, 0xb4, 0x14c },
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{ 0xC0, 0xCA, 0x08, 0x18, 0x44, 0x180, 0x1c8, 0xf4, 0x1cc },
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{ 0x280, 0x28A, 0x200, 0x210, 0x240, 0x300, 0x348, 0x2b4, 0x34c },
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{ 0x2C0, 0x2CA, 0x208, 0x218, 0x244, 0x380, 0x3c8, 0x2f4, 0x3cc },
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/* ... port 3 */
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};
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