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thermal: stm32: Disable interrupts at probe 

In case of CPU reset, the interrupts could be enabled at boot time.
Disable interrupts and clear flags.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200110101605.24984-4-p.paillet@st.com
This commit is contained in:
Pascal Paillet 2020-01-10 11:16:02 +01:00 committed by Daniel Lezcano
parent d4a7e0538f
commit 1f64fa3651
1 changed files with 14 additions and 5 deletions
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19
drivers/thermal/st/stm_thermal.c
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@ -51,6 +51,12 @@
/* DTS_DR register mask definitions */ /* DTS_DR register mask definitions */
#define TS1_MFREQ_MASK GENMASK(15, 0) #define TS1_MFREQ_MASK GENMASK(15, 0)
/* DTS_ITENR register mask definitions */
#define ITENR_MASK (GENMASK(2, 0) | GENMASK(6, 4))
/* DTS_ICIFR register mask definitions */
#define ICIFR_MASK (GENMASK(2, 0) | GENMASK(6, 4))
/* Less significant bit position definitions */ /* Less significant bit position definitions */
#define TS1_T0_POS 16 #define TS1_T0_POS 16
#define TS1_SMP_TIME_POS 16 #define TS1_SMP_TIME_POS 16
@ -330,12 +336,10 @@ static int stm_disable_irq(struct stm_thermal_sensor *sensor)
{ {
u32 value; u32 value;
/* Disable IT generation for low and high thresholds */ /* Disable IT generation */
value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET); value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET);
writel_relaxed(value & ~(LOW_THRESHOLD | HIGH_THRESHOLD), value &= ~ITENR_MASK;
sensor->base + DTS_ITENR_OFFSET); writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET);
dev_dbg(sensor->dev, "%s: IT disabled on sensor side", __func__);
return 0; return 0;
} }
@ -645,6 +649,11 @@ static int stm_thermal_probe(struct platform_device *pdev)
return PTR_ERR(sensor->clk); return PTR_ERR(sensor->clk);
} }
stm_disable_irq(sensor);
/* Clear irq flags */
writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET);
/* Register IRQ into GIC */ /* Register IRQ into GIC */
ret = stm_register_irq(sensor); ret = stm_register_irq(sensor);
if (ret) if (ret)