Merge branch 'pm-cpufreq'
* pm-cpufreq: cpufreq: s5pv210-cpufreq: fix wrong do_div() usage MAINTAINERS: update for intel P-state driver cpufreq: governor: Quit work-handlers early if governor is stopped intel_pstate: decrease number of "HWP enabled" messages cpufreq: arm_big_little: fix frequency check when bL switcher is active
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commit
1f47b0ddf3
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@ -5440,7 +5440,8 @@ S: Supported
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F: drivers/idle/intel_idle.c
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INTEL PSTATE DRIVER
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M: Kristen Carlson Accardi <kristen@linux.intel.com>
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M: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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M: Len Brown <lenb@kernel.org>
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L: linux-pm@vger.kernel.org
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S: Supported
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F: drivers/cpufreq/intel_pstate.c
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@ -149,6 +149,19 @@ bL_cpufreq_set_rate(u32 cpu, u32 old_cluster, u32 new_cluster, u32 rate)
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__func__, cpu, old_cluster, new_cluster, new_rate);
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ret = clk_set_rate(clk[new_cluster], new_rate * 1000);
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if (!ret) {
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/*
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* FIXME: clk_set_rate hasn't returned an error here however it
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* may be that clk_change_rate failed due to hardware or
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* firmware issues and wasn't able to report that due to the
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* current design of the clk core layer. To work around this
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* problem we will read back the clock rate and check it is
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* correct. This needs to be removed once clk core is fixed.
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*/
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if (clk_get_rate(clk[new_cluster]) != new_rate * 1000)
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ret = -EIO;
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}
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if (WARN_ON(ret)) {
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pr_err("clk_set_rate failed: %d, new cluster: %d\n", ret,
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new_cluster);
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@ -189,15 +202,6 @@ bL_cpufreq_set_rate(u32 cpu, u32 old_cluster, u32 new_cluster, u32 rate)
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mutex_unlock(&cluster_lock[old_cluster]);
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}
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/*
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* FIXME: clk_set_rate has to handle the case where clk_change_rate
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* can fail due to hardware or firmware issues. Until the clk core
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* layer is fixed, we can check here. In most of the cases we will
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* be reading only the cached value anyway. This needs to be removed
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* once clk core is fixed.
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*/
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if (bL_cpufreq_get_rate(cpu) != new_rate)
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return -EIO;
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return 0;
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}
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@ -171,10 +171,6 @@ void gov_queue_work(struct dbs_data *dbs_data, struct cpufreq_policy *policy,
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{
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int i;
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mutex_lock(&cpufreq_governor_lock);
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if (!policy->governor_enabled)
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goto out_unlock;
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if (!all_cpus) {
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/*
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* Use raw_smp_processor_id() to avoid preemptible warnings.
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@ -188,9 +184,6 @@ void gov_queue_work(struct dbs_data *dbs_data, struct cpufreq_policy *policy,
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for_each_cpu(i, policy->cpus)
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__gov_queue_work(i, dbs_data, delay);
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}
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out_unlock:
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mutex_unlock(&cpufreq_governor_lock);
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}
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EXPORT_SYMBOL_GPL(gov_queue_work);
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@ -229,13 +222,24 @@ static void dbs_timer(struct work_struct *work)
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struct cpu_dbs_info *cdbs = container_of(work, struct cpu_dbs_info,
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dwork.work);
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struct cpu_common_dbs_info *shared = cdbs->shared;
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struct cpufreq_policy *policy = shared->policy;
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struct dbs_data *dbs_data = policy->governor_data;
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struct cpufreq_policy *policy;
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struct dbs_data *dbs_data;
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unsigned int sampling_rate, delay;
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bool modify_all = true;
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mutex_lock(&shared->timer_mutex);
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policy = shared->policy;
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/*
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* Governor might already be disabled and there is no point continuing
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* with the work-handler.
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*/
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if (!policy)
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goto unlock;
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dbs_data = policy->governor_data;
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if (dbs_data->cdata->governor == GOV_CONSERVATIVE) {
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struct cs_dbs_tuners *cs_tuners = dbs_data->tuners;
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@ -252,6 +256,7 @@ static void dbs_timer(struct work_struct *work)
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delay = dbs_data->cdata->gov_dbs_timer(cdbs, dbs_data, modify_all);
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gov_queue_work(dbs_data, policy, delay, modify_all);
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unlock:
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mutex_unlock(&shared->timer_mutex);
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}
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@ -478,9 +483,17 @@ static int cpufreq_governor_stop(struct cpufreq_policy *policy,
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if (!shared || !shared->policy)
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return -EBUSY;
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/*
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* Work-handler must see this updated, as it should not proceed any
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* further after governor is disabled. And so timer_mutex is taken while
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* updating this value.
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*/
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mutex_lock(&shared->timer_mutex);
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shared->policy = NULL;
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mutex_unlock(&shared->timer_mutex);
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gov_cancel_work(dbs_data, policy);
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shared->policy = NULL;
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mutex_destroy(&shared->timer_mutex);
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return 0;
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}
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@ -684,8 +684,6 @@ static void __init intel_pstate_sysfs_expose_params(void)
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static void intel_pstate_hwp_enable(struct cpudata *cpudata)
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{
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pr_info("intel_pstate: HWP enabled\n");
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wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
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}
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@ -1557,8 +1555,10 @@ static int __init intel_pstate_init(void)
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if (!all_cpu_data)
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return -ENOMEM;
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if (static_cpu_has_safe(X86_FEATURE_HWP) && !no_hwp)
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if (static_cpu_has_safe(X86_FEATURE_HWP) && !no_hwp) {
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pr_info("intel_pstate: HWP enabled\n");
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hwp_active++;
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}
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if (!hwp_active && hwp_only)
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goto out;
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@ -1593,8 +1593,10 @@ static int __init intel_pstate_setup(char *str)
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if (!strcmp(str, "disable"))
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no_load = 1;
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if (!strcmp(str, "no_hwp"))
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if (!strcmp(str, "no_hwp")) {
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pr_info("intel_pstate: HWP disabled\n");
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no_hwp = 1;
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}
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if (!strcmp(str, "force"))
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force_load = 1;
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if (!strcmp(str, "hwp_only"))
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@ -212,11 +212,11 @@ static void s5pv210_set_refresh(enum s5pv210_dmc_port ch, unsigned long freq)
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/* Find current DRAM frequency */
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tmp = s5pv210_dram_conf[ch].freq;
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do_div(tmp, freq);
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tmp /= freq;
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tmp1 = s5pv210_dram_conf[ch].refresh;
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do_div(tmp1, tmp);
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tmp1 /= tmp;
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__raw_writel(tmp1, reg);
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}
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