netxen: support larger dma addressing
Support larger dma mask if firmware indicates capability to handle larger addresses. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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7e99013a50
commit
1f434f6384
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@ -1256,8 +1256,6 @@ struct netxen_adapter {
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u32 crb_win;
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rwlock_t adapter_lock;
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uint64_t dma_mask;
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u32 cmd_producer;
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__le32 *cmd_consumer;
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u32 last_cmd_consumer;
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@ -166,50 +166,61 @@ static inline void netxen_nic_enable_int(struct netxen_adapter *adapter)
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static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
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{
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struct pci_dev *pdev = adapter->pdev;
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int err;
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uint64_t mask;
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uint64_t mask, cmask;
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#ifdef CONFIG_IA64
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adapter->dma_mask = DMA_32BIT_MASK;
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#else
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if (revision_id >= NX_P3_B0) {
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/* should go to DMA_64BIT_MASK */
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adapter->dma_mask = DMA_39BIT_MASK;
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mask = DMA_39BIT_MASK;
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} else if (revision_id == NX_P3_A2) {
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adapter->dma_mask = DMA_39BIT_MASK;
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mask = DMA_39BIT_MASK;
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} else if (revision_id == NX_P2_C1) {
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adapter->dma_mask = DMA_35BIT_MASK;
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mask = DMA_35BIT_MASK;
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} else {
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adapter->dma_mask = DMA_32BIT_MASK;
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mask = DMA_32BIT_MASK;
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goto set_32_bit_mask;
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}
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adapter->pci_using_dac = 0;
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mask = DMA_32BIT_MASK;
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/*
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* Consistent DMA mask is set to 32 bit because it cannot be set to
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* 35 bits. For P3 also leave it at 32 bits for now. Only the rings
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* come off this pool.
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*/
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cmask = DMA_32BIT_MASK;
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#ifndef CONFIG_IA64
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if (revision_id >= NX_P3_B0)
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mask = DMA_39BIT_MASK;
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else if (revision_id == NX_P2_C1)
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mask = DMA_35BIT_MASK;
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#endif
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if (pci_set_dma_mask(pdev, mask) == 0 &&
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pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) == 0) {
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pci_set_consistent_dma_mask(pdev, cmask) == 0) {
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adapter->pci_using_dac = 1;
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return 0;
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}
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set_32_bit_mask:
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#endif /* CONFIG_IA64 */
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err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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if (!err)
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err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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if (err) {
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DPRINTK(ERR, "No usable DMA configuration, aborting:%d\n", err);
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return err;
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return -EIO;
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}
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/* Update addressable range if firmware supports it */
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static int
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nx_update_dma_mask(struct netxen_adapter *adapter)
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{
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int change, shift, err;
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uint64_t mask, old_mask;
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struct pci_dev *pdev = adapter->pdev;
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change = 0;
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shift = netxen_nic_reg_read(adapter, CRB_DMA_SHIFT);
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if (shift >= 32)
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return 0;
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if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9))
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change = 1;
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else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4))
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change = 1;
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if (change) {
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old_mask = pdev->dma_mask;
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mask = (1ULL<<(32+shift)) - 1;
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err = pci_set_dma_mask(pdev, mask);
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if (err)
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return pci_set_dma_mask(pdev, old_mask);
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}
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adapter->pci_using_dac = 0;
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return 0;
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}
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@ -674,6 +685,7 @@ netxen_start_firmware(struct netxen_adapter *adapter)
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netxen_pinit_from_rom(adapter, 0);
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msleep(1);
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}
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netxen_nic_reg_write(adapter, CRB_DMA_SHIFT, 0x55555555);
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netxen_load_firmware(adapter);
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if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
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@ -851,6 +863,8 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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goto err_out_iounmap;
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}
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nx_update_dma_mask(adapter);
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netxen_nic_flash_print(adapter);
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if (NX_IS_REVISION_P3(revision_id)) {
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@ -91,6 +91,7 @@
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#define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0)
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#define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4) /* Multiport Mode */
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#define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8)
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#define CRB_DMA_SHIFT NETXEN_NIC_REG(0xcc)
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#define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4)
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#define CRB_CTX_RESET NETXEN_NIC_REG(0xd8)
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#define CRB_HOST_STS_PROD NETXEN_NIC_REG(0xdc)
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