s2io: De-typedef driver.
Removed namespace collisions due to usage of nic_t as per Ralf's patch Signed-off-by: Sivakumar Subramani <sivakumar.subramani@neterion.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Ralf Baechle
Jeff Garzik
parent
a113ae066d
commit
1ee6dd770b
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@ -15,7 +15,7 @@
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#define TBD 0
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typedef struct _XENA_dev_config {
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struct XENA_dev_config {
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/* Convention: mHAL_XXX is mask, vHAL_XXX is value */
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/* General Control-Status Registers */
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@ -852,9 +852,9 @@ typedef struct _XENA_dev_config {
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#define SPI_CONTROL_DONE BIT(6)
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u64 spi_data;
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#define SPI_DATA_WRITE(data,len) vBIT(data,0,len)
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} XENA_dev_config_t;
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};
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#define XENA_REG_SPACE sizeof(XENA_dev_config_t)
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#define XENA_REG_SPACE sizeof(struct XENA_dev_config)
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#define XENA_EEPROM_SPACE (0x01 << 11)
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#endif /* _REGS_H */
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File diff suppressed because it is too large
Load Diff
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@ -39,7 +39,7 @@
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#define MAX_FLICKER_TIME 60000 /* 60 Secs */
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/* Maximum outstanding splits to be configured into xena. */
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typedef enum xena_max_outstanding_splits {
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enum {
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XENA_ONE_SPLIT_TRANSACTION = 0,
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XENA_TWO_SPLIT_TRANSACTION = 1,
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XENA_THREE_SPLIT_TRANSACTION = 2,
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@ -48,7 +48,7 @@ typedef enum xena_max_outstanding_splits {
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XENA_TWELVE_SPLIT_TRANSACTION = 5,
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XENA_SIXTEEN_SPLIT_TRANSACTION = 6,
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XENA_THIRTYTWO_SPLIT_TRANSACTION = 7
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} xena_max_outstanding_splits;
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};
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#define XENA_MAX_OUTSTANDING_SPLITS(n) (n << 4)
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/* OS concerned variables and constants */
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@ -79,7 +79,7 @@ static int debug_level = ERR_DBG;
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#define S2IO_JUMBO_SIZE 9600
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/* Driver statistics maintained by driver */
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typedef struct {
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struct swStat {
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unsigned long long single_ecc_errs;
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unsigned long long double_ecc_errs;
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unsigned long long parity_err_cnt;
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@ -94,10 +94,10 @@ typedef struct {
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unsigned long long flush_max_pkts;
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unsigned long long sum_avg_pkts_aggregated;
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unsigned long long num_aggregations;
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} swStat_t;
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};
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/* Xpak releated alarm and warnings */
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typedef struct {
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struct xpakStat {
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u64 alarm_transceiver_temp_high;
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u64 alarm_transceiver_temp_low;
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u64 alarm_laser_bias_current_high;
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@ -112,11 +112,11 @@ typedef struct {
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u64 warn_laser_output_power_low;
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u64 xpak_regs_stat;
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u32 xpak_timer_count;
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} xpakStat_t;
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};
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/* The statistics block of Xena */
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typedef struct stat_block {
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struct stat_block {
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/* Tx MAC statistics counters. */
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__le32 tmac_data_octets;
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__le32 tmac_frms;
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@ -292,9 +292,9 @@ typedef struct stat_block {
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__le32 reserved_14;
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__le32 link_fault_cnt;
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u8 buffer[20];
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swStat_t sw_stat;
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xpakStat_t xpak_stat;
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} StatInfo_t;
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struct swStat sw_stat;
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struct xpakStat xpak_stat;
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};
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/*
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* Structures representing different init time configuration
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@ -317,7 +317,7 @@ static int fifo_map[][MAX_TX_FIFOS] = {
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};
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/* Maintains Per FIFO related information. */
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typedef struct tx_fifo_config {
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struct tx_fifo_config {
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#define MAX_AVAILABLE_TXDS 8192
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u32 fifo_len; /* specifies len of FIFO upto 8192, ie no of TxDLs */
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/* Priority definition */
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@ -334,11 +334,11 @@ typedef struct tx_fifo_config {
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u8 f_no_snoop;
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#define NO_SNOOP_TXD 0x01
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#define NO_SNOOP_TXD_BUFFER 0x02
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} tx_fifo_config_t;
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};
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/* Maintains per Ring related information */
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typedef struct rx_ring_config {
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struct rx_ring_config {
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u32 num_rxd; /*No of RxDs per Rx Ring */
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#define RX_RING_PRI_0 0 /* highest */
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#define RX_RING_PRI_1 1
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@ -359,7 +359,7 @@ typedef struct rx_ring_config {
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u8 f_no_snoop;
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#define NO_SNOOP_RXD 0x01
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#define NO_SNOOP_RXD_BUFFER 0x02
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} rx_ring_config_t;
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};
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/* This structure provides contains values of the tunable parameters
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* of the H/W
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@ -369,7 +369,7 @@ struct config_param {
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u32 tx_fifo_num; /*Number of Tx FIFOs */
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u8 fifo_mapping[MAX_TX_FIFOS];
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tx_fifo_config_t tx_cfg[MAX_TX_FIFOS]; /*Per-Tx FIFO config */
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struct tx_fifo_config tx_cfg[MAX_TX_FIFOS]; /*Per-Tx FIFO config */
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u32 max_txds; /*Max no. of Tx buffer descriptor per TxDL */
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u64 tx_intr_type;
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/* Specifies if Tx Intr is UTILZ or PER_LIST type. */
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@ -378,7 +378,7 @@ struct config_param {
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u32 rx_ring_num; /*Number of receive rings */
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#define MAX_RX_BLOCKS_PER_RING 150
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rx_ring_config_t rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */
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struct rx_ring_config rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */
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u8 bimodal; /*Flag for setting bimodal interrupts*/
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#define HEADER_ETHERNET_II_802_3_SIZE 14
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@ -397,14 +397,14 @@ struct config_param {
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};
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/* Structure representing MAC Addrs */
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typedef struct mac_addr {
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struct mac_addr {
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u8 mac_addr[ETH_ALEN];
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} macaddr_t;
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};
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/* Structure that represent every FIFO element in the BAR1
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* Address location.
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*/
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typedef struct _TxFIFO_element {
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struct TxFIFO_element {
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u64 TxDL_Pointer;
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u64 List_Control;
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@ -415,10 +415,10 @@ typedef struct _TxFIFO_element {
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#define TX_FIFO_SPECIAL_FUNC BIT(23)
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#define TX_FIFO_DS_NO_SNOOP BIT(31)
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#define TX_FIFO_BUFF_NO_SNOOP BIT(30)
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} TxFIFO_element_t;
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};
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/* Tx descriptor structure */
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typedef struct _TxD {
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struct TxD {
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u64 Control_1;
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/* bit mask */
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#define TXD_LIST_OWN_XENA BIT(7)
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@ -449,16 +449,16 @@ typedef struct _TxD {
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u64 Buffer_Pointer;
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u64 Host_Control; /* reserved for host */
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} TxD_t;
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};
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/* Structure to hold the phy and virt addr of every TxDL. */
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typedef struct list_info_hold {
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struct list_info_hold {
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dma_addr_t list_phy_addr;
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void *list_virt_addr;
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} list_info_hold_t;
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};
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/* Rx descriptor structure for 1 buffer mode */
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typedef struct _RxD_t {
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struct RxD_t {
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u64 Host_Control; /* reserved for host */
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u64 Control_1;
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#define RXD_OWN_XENA BIT(7)
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@ -483,21 +483,21 @@ typedef struct _RxD_t {
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#define SET_NUM_TAG(val) vBIT(val,16,32)
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} RxD_t;
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};
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/* Rx descriptor structure for 1 buffer mode */
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typedef struct _RxD1_t {
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struct _RxD_t h;
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struct RxD1 {
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struct RxD_t h;
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#define MASK_BUFFER0_SIZE_1 vBIT(0x3FFF,2,14)
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#define SET_BUFFER0_SIZE_1(val) vBIT(val,2,14)
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#define RXD_GET_BUFFER0_SIZE_1(_Control_2) \
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(u16)((_Control_2 & MASK_BUFFER0_SIZE_1) >> 48)
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u64 Buffer0_ptr;
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} RxD1_t;
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};
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/* Rx descriptor structure for 3 or 2 buffer mode */
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typedef struct _RxD3_t {
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struct _RxD_t h;
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struct RxD3 {
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struct RxD_t h;
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#define MASK_BUFFER0_SIZE_3 vBIT(0xFF,2,14)
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#define MASK_BUFFER1_SIZE_3 vBIT(0xFFFF,16,16)
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@ -517,15 +517,15 @@ typedef struct _RxD3_t {
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u64 Buffer0_ptr;
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u64 Buffer1_ptr;
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u64 Buffer2_ptr;
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} RxD3_t;
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};
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/* Structure that represents the Rx descriptor block which contains
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* 128 Rx descriptors.
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*/
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typedef struct _RxD_block {
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struct RxD_block {
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#define MAX_RXDS_PER_BLOCK_1 127
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RxD1_t rxd[MAX_RXDS_PER_BLOCK_1];
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struct RxD1 rxd[MAX_RXDS_PER_BLOCK_1];
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u64 reserved_0;
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#define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL
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@ -535,7 +535,7 @@ typedef struct _RxD_block {
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u64 pNext_RxD_Blk_physical; /* Buff0_ptr.In a 32 bit arch
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* the upper 32 bits should
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* be 0 */
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} RxD_block_t;
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};
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#define SIZE_OF_BLOCK 4096
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@ -545,12 +545,12 @@ typedef struct _RxD_block {
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/* Structure to hold virtual addresses of Buf0 and Buf1 in
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* 2buf mode. */
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typedef struct bufAdd {
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struct buffAdd {
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void *ba_0_org;
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void *ba_1_org;
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void *ba_0;
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void *ba_1;
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} buffAdd_t;
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};
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/* Structure which stores all the MAC control parameters */
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@ -558,43 +558,46 @@ typedef struct bufAdd {
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* from which the Rx Interrupt processor can start picking
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* up the RxDs for processing.
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*/
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typedef struct _rx_curr_get_info_t {
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struct rx_curr_get_info {
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u32 block_index;
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u32 offset;
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u32 ring_len;
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} rx_curr_get_info_t;
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};
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typedef rx_curr_get_info_t rx_curr_put_info_t;
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struct rx_curr_put_info {
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u32 block_index;
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u32 offset;
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u32 ring_len;
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};
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/* This structure stores the offset of the TxDl in the FIFO
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* from which the Tx Interrupt processor can start picking
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* up the TxDLs for send complete interrupt processing.
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*/
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typedef struct {
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struct tx_curr_get_info {
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u32 offset;
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u32 fifo_len;
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} tx_curr_get_info_t;
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};
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typedef tx_curr_get_info_t tx_curr_put_info_t;
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struct tx_curr_put_info {
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u32 offset;
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u32 fifo_len;
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};
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typedef struct rxd_info {
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struct rxd_info {
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void *virt_addr;
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dma_addr_t dma_addr;
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}rxd_info_t;
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};
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/* Structure that holds the Phy and virt addresses of the Blocks */
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typedef struct rx_block_info {
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struct rx_block_info {
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void *block_virt_addr;
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dma_addr_t block_dma_addr;
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rxd_info_t *rxds;
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} rx_block_info_t;
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/* pre declaration of the nic structure */
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typedef struct s2io_nic nic_t;
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struct rxd_info *rxds;
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};
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/* Ring specific structure */
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typedef struct ring_info {
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struct ring_info {
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/* The ring number */
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int ring_no;
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@ -602,7 +605,7 @@ typedef struct ring_info {
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* Place holders for the virtual and physical addresses of
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* all the Rx Blocks
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*/
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rx_block_info_t rx_blocks[MAX_RX_BLOCKS_PER_RING];
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struct rx_block_info rx_blocks[MAX_RX_BLOCKS_PER_RING];
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int block_count;
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int pkt_cnt;
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@ -610,24 +613,24 @@ typedef struct ring_info {
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* Put pointer info which indictes which RxD has to be replenished
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* with a new buffer.
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*/
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rx_curr_put_info_t rx_curr_put_info;
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struct rx_curr_put_info rx_curr_put_info;
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/*
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* Get pointer info which indictes which is the last RxD that was
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* processed by the driver.
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*/
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rx_curr_get_info_t rx_curr_get_info;
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struct rx_curr_get_info rx_curr_get_info;
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/* Index to the absolute position of the put pointer of Rx ring */
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int put_pos;
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/* Buffer Address store. */
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buffAdd_t **ba;
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nic_t *nic;
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} ring_info_t;
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struct buffAdd **ba;
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struct s2io_nic *nic;
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};
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/* Fifo specific structure */
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typedef struct fifo_info {
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struct fifo_info {
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/* FIFO number */
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int fifo_no;
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@ -635,40 +638,40 @@ typedef struct fifo_info {
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int max_txds;
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/* Place holder of all the TX List's Phy and Virt addresses. */
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list_info_hold_t *list_info;
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struct list_info_hold *list_info;
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/*
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* Current offset within the tx FIFO where driver would write
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* new Tx frame
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*/
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tx_curr_put_info_t tx_curr_put_info;
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struct tx_curr_put_info tx_curr_put_info;
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/*
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* Current offset within tx FIFO from where the driver would start freeing
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* the buffers
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*/
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tx_curr_get_info_t tx_curr_get_info;
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struct tx_curr_get_info tx_curr_get_info;
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nic_t *nic;
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}fifo_info_t;
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struct s2io_nic *nic;
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};
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/* Information related to the Tx and Rx FIFOs and Rings of Xena
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* is maintained in this structure.
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*/
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typedef struct mac_info {
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struct mac_info {
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/* tx side stuff */
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/* logical pointer of start of each Tx FIFO */
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TxFIFO_element_t __iomem *tx_FIFO_start[MAX_TX_FIFOS];
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struct TxFIFO_element __iomem *tx_FIFO_start[MAX_TX_FIFOS];
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/* Fifo specific structure */
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fifo_info_t fifos[MAX_TX_FIFOS];
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struct fifo_info fifos[MAX_TX_FIFOS];
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/* Save virtual address of TxD page with zero DMA addr(if any) */
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void *zerodma_virt_addr;
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/* rx side stuff */
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/* Ring specific structure */
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ring_info_t rings[MAX_RX_RINGS];
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struct ring_info rings[MAX_RX_RINGS];
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u16 rmac_pause_time;
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u16 mc_pause_threshold_q0q3;
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@ -677,14 +680,14 @@ typedef struct mac_info {
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void *stats_mem; /* orignal pointer to allocated mem */
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dma_addr_t stats_mem_phy; /* Physical address of the stat block */
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u32 stats_mem_sz;
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StatInfo_t *stats_info; /* Logical address of the stat block */
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} mac_info_t;
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struct stat_block *stats_info; /* Logical address of the stat block */
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};
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/* structure representing the user defined MAC addresses */
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typedef struct {
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struct usr_addr {
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char addr[ETH_ALEN];
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int usage_cnt;
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} usr_addr_t;
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};
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/* Default Tunable parameters of the NIC. */
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#define DEFAULT_FIFO_0_LEN 4096
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@ -717,7 +720,7 @@ struct msix_info_st {
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};
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/* Data structure to represent a LRO session */
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typedef struct lro {
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struct lro {
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struct sk_buff *parent;
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struct sk_buff *last_frag;
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u8 *l2h;
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@ -733,7 +736,7 @@ typedef struct lro {
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u32 cur_tsval;
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u32 cur_tsecr;
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u8 saw_ts;
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}lro_t;
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};
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/* Structure representing one instance of the NIC */
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struct s2io_nic {
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@ -744,7 +747,7 @@ struct s2io_nic {
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*/
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int pkts_to_process;
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struct net_device *dev;
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mac_info_t mac_control;
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struct mac_info mac_control;
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struct config_param config;
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struct pci_dev *pdev;
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void __iomem *bar0;
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@ -752,8 +755,8 @@ struct s2io_nic {
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#define MAX_MAC_SUPPORTED 16
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#define MAX_SUPPORTED_MULTICASTS MAX_MAC_SUPPORTED
|
||||
|
||||
macaddr_t def_mac_addr[MAX_MAC_SUPPORTED];
|
||||
macaddr_t pre_mac_addr[MAX_MAC_SUPPORTED];
|
||||
struct mac_addr def_mac_addr[MAX_MAC_SUPPORTED];
|
||||
struct mac_addr pre_mac_addr[MAX_MAC_SUPPORTED];
|
||||
|
||||
struct net_device_stats stats;
|
||||
int high_dma_flag;
|
||||
|
|
@ -781,7 +784,7 @@ struct s2io_nic {
|
|||
#define MAX_ADDRS_SUPPORTED 64
|
||||
u16 usr_addr_count;
|
||||
u16 mc_addr_count;
|
||||
usr_addr_t usr_addrs[MAX_ADDRS_SUPPORTED];
|
||||
struct usr_addr usr_addrs[MAX_ADDRS_SUPPORTED];
|
||||
|
||||
u16 m_cast_flg;
|
||||
u16 all_multi_pos;
|
||||
|
|
@ -837,7 +840,7 @@ struct s2io_nic {
|
|||
u8 device_type;
|
||||
|
||||
#define MAX_LRO_SESSIONS 32
|
||||
lro_t lro0_n[MAX_LRO_SESSIONS];
|
||||
struct lro lro0_n[MAX_LRO_SESSIONS];
|
||||
unsigned long clubbed_frms_cnt;
|
||||
unsigned long sending_both;
|
||||
u8 lro;
|
||||
|
|
@ -972,8 +975,8 @@ static void __devexit s2io_rem_nic(struct pci_dev *pdev);
|
|||
static int init_shared_mem(struct s2io_nic *sp);
|
||||
static void free_shared_mem(struct s2io_nic *sp);
|
||||
static int init_nic(struct s2io_nic *nic);
|
||||
static void rx_intr_handler(ring_info_t *ring_data);
|
||||
static void tx_intr_handler(fifo_info_t *fifo_data);
|
||||
static void rx_intr_handler(struct ring_info *ring_data);
|
||||
static void tx_intr_handler(struct fifo_info *fifo_data);
|
||||
static void alarm_intr_handler(struct s2io_nic *sp);
|
||||
|
||||
static int s2io_starter(void);
|
||||
|
|
@ -981,38 +984,41 @@ static void s2io_closer(void);
|
|||
static void s2io_tx_watchdog(struct net_device *dev);
|
||||
static void s2io_tasklet(unsigned long dev_addr);
|
||||
static void s2io_set_multicast(struct net_device *dev);
|
||||
static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp);
|
||||
static void s2io_link(nic_t * sp, int link);
|
||||
static void s2io_reset(nic_t * sp);
|
||||
static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp);
|
||||
static void s2io_link(struct s2io_nic * sp, int link);
|
||||
static void s2io_reset(struct s2io_nic * sp);
|
||||
static int s2io_poll(struct net_device *dev, int *budget);
|
||||
static void s2io_init_pci(nic_t * sp);
|
||||
static void s2io_init_pci(struct s2io_nic * sp);
|
||||
static int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
|
||||
static void s2io_alarm_handle(unsigned long data);
|
||||
static int s2io_enable_msi(nic_t *nic);
|
||||
static int s2io_enable_msi(struct s2io_nic *nic);
|
||||
static irqreturn_t s2io_msi_handle(int irq, void *dev_id);
|
||||
static irqreturn_t
|
||||
s2io_msix_ring_handle(int irq, void *dev_id);
|
||||
static irqreturn_t
|
||||
s2io_msix_fifo_handle(int irq, void *dev_id);
|
||||
static irqreturn_t s2io_isr(int irq, void *dev_id);
|
||||
static int verify_xena_quiescence(nic_t *sp);
|
||||
static int verify_xena_quiescence(struct s2io_nic *sp);
|
||||
static const struct ethtool_ops netdev_ethtool_ops;
|
||||
static void s2io_set_link(struct work_struct *work);
|
||||
static int s2io_set_swapper(nic_t * sp);
|
||||
static void s2io_card_down(nic_t *nic);
|
||||
static int s2io_card_up(nic_t *nic);
|
||||
static int s2io_set_swapper(struct s2io_nic * sp);
|
||||
static void s2io_card_down(struct s2io_nic *nic);
|
||||
static int s2io_card_up(struct s2io_nic *nic);
|
||||
static int get_xena_rev_id(struct pci_dev *pdev);
|
||||
static int wait_for_cmd_complete(void *addr, u64 busy_bit);
|
||||
static int s2io_add_isr(nic_t * sp);
|
||||
static void s2io_rem_isr(nic_t * sp);
|
||||
static int s2io_add_isr(struct s2io_nic * sp);
|
||||
static void s2io_rem_isr(struct s2io_nic * sp);
|
||||
|
||||
static void restore_xmsi_data(nic_t *nic);
|
||||
static void restore_xmsi_data(struct s2io_nic *nic);
|
||||
|
||||
static int s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, lro_t **lro, RxD_t *rxdp, nic_t *sp);
|
||||
static void clear_lro_session(lro_t *lro);
|
||||
static int
|
||||
s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, struct lro **lro,
|
||||
struct RxD_t *rxdp, struct s2io_nic *sp);
|
||||
static void clear_lro_session(struct lro *lro);
|
||||
static void queue_rx_frame(struct sk_buff *skb);
|
||||
static void update_L3L4_header(nic_t *sp, lro_t *lro);
|
||||
static void lro_append_pkt(nic_t *sp, lro_t *lro, struct sk_buff *skb, u32 tcp_len);
|
||||
static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro);
|
||||
static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
|
||||
struct sk_buff *skb, u32 tcp_len);
|
||||
|
||||
#define s2io_tcp_mss(skb) skb_shinfo(skb)->gso_size
|
||||
#define s2io_udp_mss(skb) skb_shinfo(skb)->gso_size
|
||||
|
|
|
|||
Loading…
Reference in New Issue