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cxgb4i: set the initial sequence number 

set the initial sequence number so the 1st byte of payload is aligned on
the 8-byte boundary.

Signed-off-by: Karen Xie <kxie@chelsio.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <JBottomley@Odin.com>
This commit is contained in:
Karen Xie 2015-04-10 13:57:21 -07:00 committed by James Bottomley
parent 0ea5bf3dc1
commit 1eb88a5d4a
2 changed files with 8 additions and 2 deletions
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8
drivers/scsi/cxgbi/cxgb4i/cxgb4i.c
View File

@ -200,9 +200,9 @@ static void send_act_open_req(struct cxgbi_sock *csk, struct sk_buff *skb,
SMAC_SEL_V(csk->smac_idx) | SMAC_SEL_V(csk->smac_idx) |
ULP_MODE_V(ULP_MODE_ISCSI) | ULP_MODE_V(ULP_MODE_ISCSI) |
RCV_BUFSIZ_V(csk->rcv_win >> 10); RCV_BUFSIZ_V(csk->rcv_win >> 10);
opt2 = RX_CHANNEL_V(0) | opt2 = RX_CHANNEL_V(0) |
RSS_QUEUE_VALID_F | RSS_QUEUE_VALID_F |
(RX_FC_DISABLE_F) |
RSS_QUEUE_V(csk->rss_qid); RSS_QUEUE_V(csk->rss_qid);
if (is_t4(lldi->adapter_type)) { if (is_t4(lldi->adapter_type)) {
@ -231,6 +231,7 @@ static void send_act_open_req(struct cxgbi_sock *csk, struct sk_buff *skb,
} else { } else {
struct cpl_t5_act_open_req *req = struct cpl_t5_act_open_req *req =
(struct cpl_t5_act_open_req *)skb->head; (struct cpl_t5_act_open_req *)skb->head;
u32 isn = (prandom_u32() & ~7UL) - 1;
INIT_TP_WR(req, 0); INIT_TP_WR(req, 0);
OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ, OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ,
@ -244,7 +245,10 @@ static void send_act_open_req(struct cxgbi_sock *csk, struct sk_buff *skb,
cxgb4_select_ntuple( cxgb4_select_ntuple(
csk->cdev->ports[csk->port_id], csk->cdev->ports[csk->port_id],
csk->l2t))); csk->l2t)));
opt2 |= 1 << 31; req->rsvd = cpu_to_be32(isn);
opt2 |= T5_ISS_VALID;
opt2 |= T5_OPT_2_VALID_F;
req->opt2 = cpu_to_be32(opt2); req->opt2 = cpu_to_be32(opt2);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK, log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,

2
drivers/scsi/cxgbi/cxgb4i/cxgb4i.h
View File

@ -23,6 +23,8 @@
#define CXGB4I_TX_HEADER_LEN \ #define CXGB4I_TX_HEADER_LEN \
(sizeof(struct fw_ofld_tx_data_wr) + sizeof(struct sge_opaque_hdr)) (sizeof(struct fw_ofld_tx_data_wr) + sizeof(struct sge_opaque_hdr))
#define T5_ISS_VALID (1 << 18)
struct ulptx_idata { struct ulptx_idata {
__be32 cmd_more; __be32 cmd_more;
__be32 len; __be32 len;