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Blackfin: SMP: flush CoreB cache when shutting down 

When CoreB wakes up, it needs to read variables that CoreA might have
modified, and might be in CoreB's cache.  So kill CoreB's cache before
going to sleep so that when we wake up, we are in a coherent state.

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Graf Yang 2010-03-19 08:01:27 +00:00 committed by Mike Frysinger
parent f741a79e98
commit 1e924e2f1e
1 changed files with 9 additions and 0 deletions
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9
arch/blackfin/mach-bf561/hotplug.c
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@ -7,6 +7,7 @@
#include <linux/smp.h>
#include <asm/blackfin.h>
#include <asm/cacheflush.h>
#include <mach/pll.h>
int hotplug_coreb;
@ -14,8 +15,16 @@ int hotplug_coreb;
void platform_cpu_die(void)
{
unsigned long iwr;
hotplug_coreb = 1;
/*
* When CoreB wakes up, the code in _coreb_trampoline_start cannot
* turn off the data cache. This causes the CoreB failed to boot.
* As a workaround, we invalidate all the data cache before sleep.
*/
blackfin_invalidate_entire_dcache();
/* disable core timer */
bfin_write_TCNTL(0);