OMAP3: re-organize the ASM sleep code
Organize the code in the following sections: - register access macros, - API functions, - internal functions. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Jean Pihet
Kevin Hilman
parent
fe360e1c86
commit
1e81bc015a
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@ -79,6 +79,7 @@ ENTRY(get_restore_pointer)
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ldmfd sp!, {pc} @ restore regs and return
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ENTRY(get_restore_pointer_sz)
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.word . - get_restore_pointer
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.text
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/* Function call to get the restore pointer for 3630 resume from OFF */
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ENTRY(get_omap3630_restore_pointer)
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@ -88,10 +89,19 @@ ENTRY(get_omap3630_restore_pointer)
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ENTRY(get_omap3630_restore_pointer_sz)
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.word . - get_omap3630_restore_pointer
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.text
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/* Function call to get the restore pointer for ES3 to resume from OFF */
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ENTRY(get_es3_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore_es3
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ldmfd sp!, {pc} @ restore regs and return
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ENTRY(get_es3_restore_pointer_sz)
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.word . - get_es3_restore_pointer
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.text
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/*
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* L2 cache needs to be toggled for stable OFF mode functionality on 3630.
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* This function sets up a fflag that will allow for this toggling to take
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* This function sets up a flag that will allow for this toggling to take
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* place on 3630. Hopefully some version in the future maynot need this
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*/
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ENTRY(enable_omap3630_toggle_l2_on_restore)
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@ -101,58 +111,6 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
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str r1, l2dis_3630
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ldmfd sp!, {pc} @ restore regs and return
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.text
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/* Function call to get the restore pointer for for ES3 to resume from OFF */
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ENTRY(get_es3_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore_es3
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ldmfd sp!, {pc} @ restore regs and return
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ENTRY(get_es3_restore_pointer_sz)
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.word . - get_es3_restore_pointer
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ENTRY(es3_sdrc_fix)
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ldr r4, sdrc_syscfg @ get config addr
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ldr r5, [r4] @ get value
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tst r5, #0x100 @ is part access blocked
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it eq
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biceq r5, r5, #0x100 @ clear bit if set
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str r5, [r4] @ write back change
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ldr r4, sdrc_mr_0 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_emr2_0 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_manual_0 @ get config addr
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mov r5, #0x2 @ autorefresh command
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str r5, [r4] @ kick off refreshes
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ldr r4, sdrc_mr_1 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_emr2_1 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_manual_1 @ get config addr
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mov r5, #0x2 @ autorefresh command
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str r5, [r4] @ kick off refreshes
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bx lr
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sdrc_syscfg:
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.word SDRC_SYSCONFIG_P
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sdrc_mr_0:
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.word SDRC_MR_0_P
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sdrc_emr2_0:
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.word SDRC_EMR2_0_P
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sdrc_manual_0:
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.word SDRC_MANUAL_0_P
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sdrc_mr_1:
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.word SDRC_MR_1_P
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sdrc_emr2_1:
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.word SDRC_EMR2_1_P
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sdrc_manual_1:
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.word SDRC_MANUAL_1_P
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ENTRY(es3_sdrc_fix_sz)
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.word . - es3_sdrc_fix
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/* Function to call rom code to save secure ram context */
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ENTRY(save_secure_ram_context)
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stmfd sp!, {r1-r12, lr} @ save registers on stack
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@ -578,6 +536,56 @@ skip_l2_inval:
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/* restore regs and return */
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ldmfd sp!, {r0-r12, pc}
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/*
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* Internal functions
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*/
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.text
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ENTRY(es3_sdrc_fix)
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ldr r4, sdrc_syscfg @ get config addr
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ldr r5, [r4] @ get value
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tst r5, #0x100 @ is part access blocked
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it eq
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biceq r5, r5, #0x100 @ clear bit if set
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str r5, [r4] @ write back change
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ldr r4, sdrc_mr_0 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_emr2_0 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_manual_0 @ get config addr
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mov r5, #0x2 @ autorefresh command
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str r5, [r4] @ kick off refreshes
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ldr r4, sdrc_mr_1 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_emr2_1 @ get config addr
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ldr r5, [r4] @ get value
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str r5, [r4] @ write back change
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ldr r4, sdrc_manual_1 @ get config addr
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mov r5, #0x2 @ autorefresh command
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str r5, [r4] @ kick off refreshes
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bx lr
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sdrc_syscfg:
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.word SDRC_SYSCONFIG_P
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sdrc_mr_0:
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.word SDRC_MR_0_P
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sdrc_emr2_0:
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.word SDRC_EMR2_0_P
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sdrc_manual_0:
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.word SDRC_MANUAL_0_P
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sdrc_mr_1:
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.word SDRC_MR_1_P
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sdrc_emr2_1:
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.word SDRC_EMR2_1_P
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sdrc_manual_1:
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.word SDRC_MANUAL_1_P
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ENTRY(es3_sdrc_fix_sz)
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.word . - es3_sdrc_fix
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/* Make sure SDRC accesses are ok */
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wait_sdrc_ok:
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