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A fix from Mauro to correct csrow size accounting in sysfs and a sparse 

fix from Stephen Hemminger.
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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC fixes from Borislav Petkov:
 "A fix from Mauro to correct csrow size accounting in sysfs and a
  sparse fix from Stephen Hemminger."

* tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC: Merge mci.mem_is_per_rank with mci.csbased
  amd64_edac: Correct DIMM sizes
  EDAC: Make sysfs functions static
This commit is contained in:
Linus Torvalds 2013-03-22 12:44:22 -07:00
parent 51f0885e54 9713faecff
commit 1e0695cbc8
4 changed files with 19 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/edac/amd64_edac.c
View File

@ -2048,12 +2048,18 @@ static int init_csrows(struct mem_ctl_info *mci)
edac_dbg(1, "MC node: %d, csrow: %d\n",
pvt->mc_node_id, i);
if (row_dct0)
if (row_dct0) {
nr_pages = amd64_csrow_nr_pages(pvt, 0, i);
csrow->channels[0]->dimm->nr_pages = nr_pages;
}
/* K8 has only one DCT */
if (boot_cpu_data.x86 != 0xf && row_dct1)
nr_pages += amd64_csrow_nr_pages(pvt, 1, i);
if (boot_cpu_data.x86 != 0xf && row_dct1) {
int row_dct1_pages = amd64_csrow_nr_pages(pvt, 1, i);
csrow->channels[1]->dimm->nr_pages = row_dct1_pages;
nr_pages += row_dct1_pages;
}
mtype = amd64_determine_memory_type(pvt, i);
@ -2072,9 +2078,7 @@ static int init_csrows(struct mem_ctl_info *mci)
dimm = csrow->channels[j]->dimm;
dimm->mtype = mtype;
dimm->edac_mode = edac_mode;
dimm->nr_pages = nr_pages;
}
csrow->nr_pages = nr_pages;
}
return empty;
@ -2419,7 +2423,6 @@ static int amd64_init_one_instance(struct pci_dev *F2)
mci->pvt_info = pvt;
mci->pdev = &pvt->F2->dev;
mci->csbased = 1;
setup_mci_misc_attrs(mci, fam_type);

6
drivers/edac/edac_mc.c
View File

@ -86,7 +86,7 @@ static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
edac_dimm_info_location(dimm, location, sizeof(location));
edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
dimm->mci->mem_is_per_rank ? "rank" : "dimm",
dimm->mci->csbased ? "rank" : "dimm",
number, location, dimm->csrow, dimm->cschannel);
edac_dbg(4, " dimm = %p\n", dimm);
edac_dbg(4, " dimm->label = '%s'\n", dimm->label);
@ -341,7 +341,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
mci->nr_csrows = tot_csrows;
mci->num_cschannel = tot_channels;
mci->mem_is_per_rank = per_rank;
mci->csbased = per_rank;
/*
* Alocate and fill the csrow/channels structs
@ -1235,7 +1235,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
* incrementing the compat API counters
*/
edac_dbg(4, "%s csrows map: (%d,%d)\n",
mci->mem_is_per_rank ? "rank" : "dimm",
mci->csbased ? "rank" : "dimm",
dimm->csrow, dimm->cschannel);
if (row == -1)
row = dimm->csrow;

17
drivers/edac/edac_mc_sysfs.c
View File

@ -143,7 +143,7 @@ static const char *edac_caps[] = {
* and the per-dimm/per-rank one
*/
#define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
struct dev_ch_attribute {
struct device_attribute attr;
@ -180,9 +180,6 @@ static ssize_t csrow_size_show(struct device *dev,
int i;
u32 nr_pages = 0;
if (csrow->mci->csbased)
return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages));
for (i = 0; i < csrow->nr_channels; i++)
nr_pages += csrow->channels[i]->dimm->nr_pages;
return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
@ -612,7 +609,7 @@ static int edac_create_dimm_object(struct mem_ctl_info *mci,
device_initialize(&dimm->dev);
dimm->dev.parent = &mci->dev;
if (mci->mem_is_per_rank)
if (mci->csbased)
dev_set_name(&dimm->dev, "rank%d", index);
else
dev_set_name(&dimm->dev, "dimm%d", index);
@ -778,14 +775,10 @@ static ssize_t mci_size_mb_show(struct device *dev,
for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
struct csrow_info *csrow = mci->csrows[csrow_idx];
if (csrow->mci->csbased) {
total_pages += csrow->nr_pages;
} else {
for (j = 0; j < csrow->nr_channels; j++) {
struct dimm_info *dimm = csrow->channels[j]->dimm;
for (j = 0; j < csrow->nr_channels; j++) {
struct dimm_info *dimm = csrow->channels[j]->dimm;
total_pages += dimm->nr_pages;
}
total_pages += dimm->nr_pages;
}
}

7
include/linux/edac.h
View File

@ -561,7 +561,6 @@ struct csrow_info {
u32 ue_count; /* Uncorrectable Errors for this csrow */
u32 ce_count; /* Correctable Errors for this csrow */
u32 nr_pages; /* combined pages count of all channels */
struct mem_ctl_info *mci; /* the parent */
@ -676,11 +675,11 @@ struct mem_ctl_info {
* sees memory sticks ("dimms"), and the ones that sees memory ranks.
* All old memory controllers enumerate memories per rank, but most
* of the recent drivers enumerate memories per DIMM, instead.
* When the memory controller is per rank, mem_is_per_rank is true.
* When the memory controller is per rank, csbased is true.
*/
unsigned n_layers;
struct edac_mc_layer *layers;
bool mem_is_per_rank;
bool csbased;
/*
* DIMM info. Will eventually remove the entire csrows_info some day
@ -741,8 +740,6 @@ struct mem_ctl_info {
u32 fake_inject_ue;
u16 fake_inject_count;
#endif
__u8 csbased : 1, /* csrow-based memory controller */
__resv : 7;
};
#endif