Documentation, intel_pstate: Improve legacy mode internal governors description

The current documentation is incomplete wrt the intel_pstate legacy
internal governors.  The confusion comes from the general cpufreq
governors which also use the names performance and powersave.  This patch
better differentiates between the two sets of governors and gives an
explanation of how the internal P-state governors behave differently from
one another.

Also fix two minor typos.

Cc: Prarit Bhargava <prarit@redhat.com>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Cc: Kristen Carlson Accardi <kristen@linux.intel.com>
Cc: Dirk Brandewie <dirk.j.brandewie@intel.com>
Cc: x86@kernel.org
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Prarit Bhargava <prarit@redhat.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
This commit is contained in:
Prarit Bhargava 2015-06-01 09:36:04 -04:00 committed by Jonathan Corbet
parent 582ed8d51e
commit 1df1b3618d
2 changed files with 12 additions and 11 deletions

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@ -36,7 +36,7 @@ Contents:
1. What Is A CPUFreq Governor? 1. What Is A CPUFreq Governor?
============================== ==============================
Most cpufreq drivers (in fact, all except one, longrun) or even most Most cpufreq drivers (except the intel_pstate and longrun) or even most
cpu frequency scaling algorithms only offer the CPU to be set to one cpu frequency scaling algorithms only offer the CPU to be set to one
frequency. In order to offer dynamic frequency scaling, the cpufreq frequency. In order to offer dynamic frequency scaling, the cpufreq
core must be able to tell these drivers of a "target frequency". So core must be able to tell these drivers of a "target frequency". So

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@ -3,24 +3,25 @@ Intel P-state driver
This driver provides an interface to control the P state selection for This driver provides an interface to control the P state selection for
SandyBridge+ Intel processors. The driver can operate two different SandyBridge+ Intel processors. The driver can operate two different
modes based on the processor model legacy and Hardware P state (HWP) modes based on the processor model, legacy mode and Hardware P state (HWP)
mode. mode.
In legacy mode the driver implements a scaling driver with an internal In legacy mode, the Intel P-state implements two internal governors,
governor for Intel Core processors. The driver follows the same model performance and powersave, that differ from the general cpufreq governors of
as the Transmeta scaling driver (longrun.c) and implements the the same name (the general cpufreq governors implement target(), whereas the
setpolicy() instead of target(). Scaling drivers that implement internal Intel P-state governors implement setpolicy()). The internal
setpolicy() are assumed to implement internal governors by the cpufreq performance governor sets the max_perf_pct and min_perf_pct to 100; that is,
core. All the logic for selecting the current P state is contained the governor selects the highest available P state to maximize the performance
within the driver; no external governor is used by the cpufreq core. of the core. The internal powersave governor selects the appropriate P state
based on the current load on the CPU.
In HWP mode P state selection is implemented in the processor In HWP mode P state selection is implemented in the processor
itself. The driver provides the interfaces between the cpufreq core and itself. The driver provides the interfaces between the cpufreq core and
the processor to control P state selection based on user preferences the processor to control P state selection based on user preferences
and reporting frequency to the cpufreq core. In this mode the and reporting frequency to the cpufreq core. In this mode the
internal governor code is disabled. internal Intel P-state governor code is disabled.
In addtion to the interfaces provided by the cpufreq core for In addition to the interfaces provided by the cpufreq core for
controlling frequency the driver provides sysfs files for controlling frequency the driver provides sysfs files for
controlling P state selection. These files have been added to controlling P state selection. These files have been added to
/sys/devices/system/cpu/intel_pstate/ /sys/devices/system/cpu/intel_pstate/