Documentation, intel_pstate: Improve legacy mode internal governors description
The current documentation is incomplete wrt the intel_pstate legacy internal governors. The confusion comes from the general cpufreq governors which also use the names performance and powersave. This patch better differentiates between the two sets of governors and gives an explanation of how the internal P-state governors behave differently from one another. Also fix two minor typos. Cc: Prarit Bhargava <prarit@redhat.com> Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Cc: Kristen Carlson Accardi <kristen@linux.intel.com> Cc: Dirk Brandewie <dirk.j.brandewie@intel.com> Cc: x86@kernel.org Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
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@ -36,7 +36,7 @@ Contents:
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1. What Is A CPUFreq Governor?
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1. What Is A CPUFreq Governor?
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==============================
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==============================
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Most cpufreq drivers (in fact, all except one, longrun) or even most
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Most cpufreq drivers (except the intel_pstate and longrun) or even most
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cpu frequency scaling algorithms only offer the CPU to be set to one
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cpu frequency scaling algorithms only offer the CPU to be set to one
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frequency. In order to offer dynamic frequency scaling, the cpufreq
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frequency. In order to offer dynamic frequency scaling, the cpufreq
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core must be able to tell these drivers of a "target frequency". So
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core must be able to tell these drivers of a "target frequency". So
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@ -3,24 +3,25 @@ Intel P-state driver
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This driver provides an interface to control the P state selection for
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This driver provides an interface to control the P state selection for
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SandyBridge+ Intel processors. The driver can operate two different
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SandyBridge+ Intel processors. The driver can operate two different
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modes based on the processor model legacy and Hardware P state (HWP)
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modes based on the processor model, legacy mode and Hardware P state (HWP)
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mode.
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mode.
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In legacy mode the driver implements a scaling driver with an internal
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In legacy mode, the Intel P-state implements two internal governors,
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governor for Intel Core processors. The driver follows the same model
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performance and powersave, that differ from the general cpufreq governors of
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as the Transmeta scaling driver (longrun.c) and implements the
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the same name (the general cpufreq governors implement target(), whereas the
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setpolicy() instead of target(). Scaling drivers that implement
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internal Intel P-state governors implement setpolicy()). The internal
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setpolicy() are assumed to implement internal governors by the cpufreq
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performance governor sets the max_perf_pct and min_perf_pct to 100; that is,
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core. All the logic for selecting the current P state is contained
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the governor selects the highest available P state to maximize the performance
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within the driver; no external governor is used by the cpufreq core.
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of the core. The internal powersave governor selects the appropriate P state
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based on the current load on the CPU.
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In HWP mode P state selection is implemented in the processor
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In HWP mode P state selection is implemented in the processor
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itself. The driver provides the interfaces between the cpufreq core and
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itself. The driver provides the interfaces between the cpufreq core and
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the processor to control P state selection based on user preferences
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the processor to control P state selection based on user preferences
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and reporting frequency to the cpufreq core. In this mode the
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and reporting frequency to the cpufreq core. In this mode the
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internal governor code is disabled.
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internal Intel P-state governor code is disabled.
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In addtion to the interfaces provided by the cpufreq core for
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In addition to the interfaces provided by the cpufreq core for
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controlling frequency the driver provides sysfs files for
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controlling frequency the driver provides sysfs files for
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controlling P state selection. These files have been added to
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controlling P state selection. These files have been added to
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/sys/devices/system/cpu/intel_pstate/
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/sys/devices/system/cpu/intel_pstate/
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