dt-bindings: ddr: Add bindings for LPDDR3 memories
Specifies the AC timing parameters of the LPDDR3 memory device. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Lukasz Luba
Krzysztof Kozlowski
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e9920bc28a
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1d816d3454
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* AC timing parameters of LPDDR3 memories for a given speed-bin.
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The structures are based on LPDDR2 and extended where needed.
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Required properties:
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- compatible : Should be "jedec,lpddr3-timings"
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- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
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- reg : maximum DDR clock frequency for the speed-bin. Type is <u32>
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Optional properties:
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The following properties represent AC timing parameters from the memory
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data-sheet of the device for a given speed-bin. All these properties are
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of type <u32> and the default unit is ps (pico seconds).
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- tRFC
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- tRRD
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- tRPab
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- tRPpb
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- tRCD
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- tRC
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- tRAS
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- tWTR
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- tWR
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- tRTP
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- tW2W-C2C
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- tR2R-C2C
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- tFAW
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- tXSR
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- tXP
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- tCKE
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- tCKESR
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- tMRD
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Example:
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timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
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compatible = "jedec,lpddr3-timings";
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reg = <800000000>; /* workaround: it shows max-freq */
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min-freq = <100000000>;
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tRFC = <65000>;
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tRRD = <6000>;
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tRPab = <12000>;
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tRPpb = <12000>;
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tRCD = <10000>;
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tRC = <33750>;
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tRAS = <23000>;
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tWTR = <3750>;
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tWR = <7500>;
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tRTP = <3750>;
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tW2W-C2C = <0>;
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tR2R-C2C = <0>;
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tFAW = <25000>;
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tXSR = <70000>;
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tXP = <3750>;
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tCKE = <3750>;
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tCKESR = <3750>;
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tMRD = <7000>;
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};
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@ -0,0 +1,97 @@
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* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
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Required properties:
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- compatible : Should be - "jedec,lpddr3"
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- density : <u32> representing density in Mb (Mega bits)
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- io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
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- #address-cells: Must be set to 1
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- #size-cells: Must be set to 0
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Optional properties:
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The following optional properties represent the minimum value of some AC
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timing parameters of the DDR device in terms of number of clock cycles.
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These values shall be obtained from the device data-sheet.
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- tRFC-min-tck
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- tRRD-min-tck
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- tRPab-min-tck
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- tRPpb-min-tck
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- tRCD-min-tck
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- tRC-min-tck
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- tRAS-min-tck
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- tWTR-min-tck
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- tWR-min-tck
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- tRTP-min-tck
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- tW2W-C2C-min-tck
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- tR2R-C2C-min-tck
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- tWL-min-tck
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- tDQSCK-min-tck
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- tRL-min-tck
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- tFAW-min-tck
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- tXSR-min-tck
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- tXP-min-tck
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- tCKE-min-tck
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- tCKESR-min-tck
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- tMRD-min-tck
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Child nodes:
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- The lpddr3 node may have one or more child nodes of type "lpddr3-timings".
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"lpddr3-timings" provides AC timing parameters of the device for
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a given speed-bin. Please see Documentation/devicetree/
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bindings/ddr/lpddr3-timings.txt for more information on "lpddr3-timings"
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Example:
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samsung_K3QF2F20DB: lpddr3 {
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compatible = "Samsung,K3QF2F20DB", "jedec,lpddr3";
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density = <16384>;
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io-width = <32>;
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#address-cells = <1>;
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#size-cells = <0>;
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tRFC-min-tck = <17>;
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tRRD-min-tck = <2>;
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tRPab-min-tck = <2>;
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tRPpb-min-tck = <2>;
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tRCD-min-tck = <3>;
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tRC-min-tck = <6>;
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tRAS-min-tck = <5>;
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tWTR-min-tck = <2>;
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tWR-min-tck = <7>;
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tRTP-min-tck = <2>;
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tW2W-C2C-min-tck = <0>;
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tR2R-C2C-min-tck = <0>;
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tWL-min-tck = <8>;
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tDQSCK-min-tck = <5>;
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tRL-min-tck = <14>;
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tFAW-min-tck = <5>;
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tXSR-min-tck = <12>;
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tXP-min-tck = <2>;
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tCKE-min-tck = <2>;
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tCKESR-min-tck = <2>;
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tMRD-min-tck = <5>;
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timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
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compatible = "jedec,lpddr3-timings";
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reg = <800000000>; /* workaround: it shows max-freq */
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min-freq = <100000000>;
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tRFC = <65000>;
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tRRD = <6000>;
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tRPab = <12000>;
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tRPpb = <12000>;
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tRCD = <10000>;
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tRC = <33750>;
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tRAS = <23000>;
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tWTR = <3750>;
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tWR = <7500>;
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tRTP = <3750>;
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tW2W-C2C = <0>;
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tR2R-C2C = <0>;
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tFAW = <25000>;
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tXSR = <70000>;
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tXP = <3750>;
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tCKE = <3750>;
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tCKESR = <3750>;
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tMRD = <7000>;
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};
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}
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