fpga: Clarify how write_init works streaming modes
This interface was designed for streaming, but write_init's buf argument has an unclear purpose. Define it to be the first bytes of the bitstream. Each driver gets to set how many bytes (at most) it wants to see. Short bitstreams will be passed through as-is, while long ones will be truncated. The intent is to allow drivers to peek at the header before the transfer actually starts. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: Alan Tull <atull@opensource.altera.com>
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@ -169,7 +169,10 @@ The programming sequence is:
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2. .write (may be called once or multiple times)
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3. .write_complete
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The .write_init function will prepare the FPGA to receive the image data.
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The .write_init function will prepare the FPGA to receive the image data. The
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buffer passed into .write_init will be atmost .initial_header_size bytes long,
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if the whole bitstream is not immediately available then the core code will
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buffer up at least this much before starting.
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The .write function writes a buffer to the FPGA. The buffer may be contain the
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whole FPGA image or may be a smaller chunk of an FPGA image. In the latter
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@ -53,10 +53,12 @@ int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
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/*
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* Call the low level driver's write_init function. This will do the
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* device-specific things to get the FPGA into the state where it is
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* ready to receive an FPGA image.
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* ready to receive an FPGA image. The low level driver only gets to
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* see the first initial_header_size bytes in the buffer.
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*/
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mgr->state = FPGA_MGR_STATE_WRITE_INIT;
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ret = mgr->mops->write_init(mgr, info, buf, count);
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ret = mgr->mops->write_init(mgr, info, buf,
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min(mgr->mops->initial_header_size, count));
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if (ret) {
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dev_err(dev, "Error preparing FPGA for writing\n");
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mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
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@ -470,6 +470,7 @@ static enum fpga_mgr_states socfpga_a10_fpga_state(struct fpga_manager *mgr)
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}
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static const struct fpga_manager_ops socfpga_a10_fpga_mgr_ops = {
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.initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4,
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.state = socfpga_a10_fpga_state,
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.write_init = socfpga_a10_fpga_write_init,
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.write = socfpga_a10_fpga_write,
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@ -84,6 +84,7 @@ struct fpga_image_info {
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/**
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* struct fpga_manager_ops - ops for low level fpga manager drivers
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* @initial_header_size: Maximum number of bytes that should be passed into write_init
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* @state: returns an enum value of the FPGA's state
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* @write_init: prepare the FPGA to receive confuration data
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* @write: write count bytes of configuration data to the FPGA
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@ -95,6 +96,7 @@ struct fpga_image_info {
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* called, so leaving them out is fine.
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*/
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struct fpga_manager_ops {
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size_t initial_header_size;
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enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
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int (*write_init)(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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