[ALSA] intel8x0 - Fix PM
Intel8x0 driver Fixed the PCM resume of intel8x0. Restores the requested register setting. Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -389,6 +389,7 @@ typedef struct {
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struct ac97_pcm *pcm;
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int pcm_open_flag;
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unsigned int page_attr_changed: 1;
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unsigned int suspended: 1;
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} ichdev_t;
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typedef struct _snd_intel8x0 intel8x0_t;
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@ -862,12 +863,16 @@ static int snd_intel8x0_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
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unsigned long port = ichdev->reg_offset;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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ichdev->suspended = 0;
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/* fallthru */
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case SNDRV_PCM_TRIGGER_START:
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val = ICH_IOCE | ICH_STARTBM;
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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ichdev->suspended = 1;
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/* fallthru */
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case SNDRV_PCM_TRIGGER_STOP:
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val = 0;
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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@ -899,9 +904,11 @@ static int snd_intel8x0_ali_trigger(snd_pcm_substream_t *substream, int cmd)
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val = igetdword(chip, ICHREG(ALI_DMACR));
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_RESUME:
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ichdev->suspended = 0;
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/* fallthru */
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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case SNDRV_PCM_TRIGGER_RESUME:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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/* clear FIFO for synchronization of channels */
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fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]);
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@ -913,9 +920,11 @@ static int snd_intel8x0_ali_trigger(snd_pcm_substream_t *substream, int cmd)
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val &= ~(1 << (ichdev->ali_slot + 16)); /* clear PAUSE flag */
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iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot)); /* start DMA */
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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ichdev->suspended = 1;
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/* fallthru */
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16))); /* pause */
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iputbyte(chip, port + ICH_REG_OFF_CR, 0);
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while (igetbyte(chip, port + ICH_REG_OFF_CR))
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@ -994,6 +1003,8 @@ static void snd_intel8x0_setup_pcm_out(intel8x0_t *chip,
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{
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unsigned int cnt;
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int dbl = runtime->rate > 48000;
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spin_lock_irq(&chip->reg_lock);
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switch (chip->device_type) {
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case DEVICE_ALI:
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cnt = igetdword(chip, ICHREG(ALI_SCR));
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@ -1037,6 +1048,7 @@ static void snd_intel8x0_setup_pcm_out(intel8x0_t *chip,
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iputdword(chip, ICHREG(GLOB_CNT), cnt);
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break;
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}
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spin_unlock_irq(&chip->reg_lock);
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}
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static int snd_intel8x0_pcm_prepare(snd_pcm_substream_t * substream)
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@ -1048,15 +1060,12 @@ static int snd_intel8x0_pcm_prepare(snd_pcm_substream_t * substream)
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ichdev->physbuf = runtime->dma_addr;
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ichdev->size = snd_pcm_lib_buffer_bytes(substream);
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ichdev->fragsize = snd_pcm_lib_period_bytes(substream);
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spin_lock_irq(&chip->reg_lock);
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if (ichdev->ichd == ICHD_PCMOUT) {
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snd_intel8x0_setup_pcm_out(chip, runtime);
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if (chip->device_type == DEVICE_INTEL_ICH4) {
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if (chip->device_type == DEVICE_INTEL_ICH4)
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ichdev->pos_shift = (runtime->sample_bits > 16) ? 2 : 1;
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}
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}
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snd_intel8x0_setup_periods(chip, ichdev);
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spin_unlock_irq(&chip->reg_lock);
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return 0;
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}
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@ -2424,6 +2433,20 @@ static int intel8x0_resume(snd_card_t *card)
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}
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}
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/* resume status */
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for (i = 0; i < chip->bdbars_count; i++) {
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ichdev_t *ichdev = &chip->ichd[i];
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unsigned long port = ichdev->reg_offset;
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if (! ichdev->substream || ! ichdev->suspended)
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continue;
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if (ichdev->ichd == ICHD_PCMOUT)
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snd_intel8x0_setup_pcm_out(chip, ichdev->substream->runtime);
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iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);
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iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);
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iputbyte(chip, port + ICH_REG_OFF_CIV, ichdev->civ);
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iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
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}
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return 0;
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}
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#endif /* CONFIG_PM */
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