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dt-bindings: PCI: dra7xx: Add properties to enable x2 lane in dra7 

Add syscon properties required for configuring PCIe in x2 lane mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Kishon Vijay Abraham I 2019-01-24 13:59:56 +05:30 committed by Lorenzo Pieralisi
parent 33d5c207a9
commit 1c5d2cc719
1 changed files with 3 additions and 0 deletions
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3
Documentation/devicetree/bindings/pci/ti-pci.txt
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@ -13,6 +13,9 @@ PCIe DesignWare Controller
- ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
where <X> is the instance number of the pcie from the HW spec.
- num-lanes as specified in ../designware-pcie.txt
- ti,syscon-lane-sel : phandle/offset pair. Phandle to the system control
module and the register offset to specify lane
selection.
HOST MODE
=========