x86: Merge io.h
io_32.h and io_64.h are now identical. Merge them into io.h. Signed-off-by: Brian Gerst <brgerst@gmail.com> LKML-Reference: <1265380629-3212-8-git-send-email-brgerst@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
parent
910bf6ad0b
commit
1c5b9069e1
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@ -1,8 +1,42 @@
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#ifndef _ASM_X86_IO_H
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#define _ASM_X86_IO_H
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/*
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* This file contains the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*
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* This file is not meant to be obfuscating: it's just complicated
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* to (a) handle it all in a way that makes gcc able to optimize it
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* as well as possible and (b) trying to avoid writing the same thing
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* over and over again with slight variations and possibly making a
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* mistake somewhere.
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*/
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/*
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* Thanks to James van Artsdalen for a better timing-fix than
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* the two short jumps: using outb's to a nonexistent port seems
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* to guarantee better timings even on fast machines.
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*
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* On the other hand, I'd like to be sure of a non-existent port:
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* I feel a bit unsafe about using 0x80 (should be safe, though)
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*
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* Linus
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*/
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/*
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* Bit simplified and optimized by Jan Hubicka
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* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
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*
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* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
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* isa_read[wl] and isa_write[wl] fixed
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* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
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*/
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#define ARCH_HAS_IOREMAP_WC
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#include <linux/string.h>
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#include <linux/compiler.h>
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#include <asm-generic/int-ll64.h>
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#include <asm/page.h>
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@ -173,11 +207,126 @@ static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
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extern void iounmap(volatile void __iomem *addr);
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#ifdef CONFIG_X86_32
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# include "io_32.h"
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#else
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# include "io_64.h"
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#ifdef __KERNEL__
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#include <asm-generic/iomap.h>
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#include <linux/vmalloc.h>
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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static inline void
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memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
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{
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memset((void __force *)addr, val, count);
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}
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static inline void
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memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
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{
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memcpy(dst, (const void __force *)src, count);
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}
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static inline void
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memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
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{
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memcpy((void __force *)dst, src, count);
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}
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/*
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* ISA space is 'always mapped' on a typical x86 system, no need to
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* explicitly ioremap() it. The fact that the ISA IO space is mapped
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* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
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* are physical addresses. The following constant pointer can be
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* used as the IO-area pointer (it can be iounmapped as well, so the
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* analogy with PCI is quite large):
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*/
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#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
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/*
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* Cache management
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*
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* This needed for two cases
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* 1. Out of order aware processors
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* 2. Accidentally out of order processors (PPro errata #51)
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*/
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static inline void flush_write_buffers(void)
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{
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#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
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asm volatile("lock; addl $0,0(%%esp)": : :"memory");
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#endif
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}
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#endif /* __KERNEL__ */
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extern void native_io_delay(void);
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extern int io_delay_type;
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extern void io_delay_init(void);
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#if defined(CONFIG_PARAVIRT)
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#include <asm/paravirt.h>
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#else
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static inline void slow_down_io(void)
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{
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native_io_delay();
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#ifdef REALLY_SLOW_IO
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native_io_delay();
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native_io_delay();
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native_io_delay();
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#endif
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}
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#endif
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#define BUILDIO(bwl, bw, type) \
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static inline void out##bwl(unsigned type value, int port) \
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{ \
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asm volatile("out" #bwl " %" #bw "0, %w1" \
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: : "a"(value), "Nd"(port)); \
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} \
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\
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static inline unsigned type in##bwl(int port) \
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{ \
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unsigned type value; \
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asm volatile("in" #bwl " %w1, %" #bw "0" \
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: "=a"(value) : "Nd"(port)); \
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return value; \
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} \
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\
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static inline void out##bwl##_p(unsigned type value, int port) \
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{ \
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out##bwl(value, port); \
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slow_down_io(); \
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} \
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\
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static inline unsigned type in##bwl##_p(int port) \
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{ \
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unsigned type value = in##bwl(port); \
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slow_down_io(); \
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return value; \
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} \
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\
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static inline void outs##bwl(int port, const void *addr, unsigned long count) \
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{ \
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asm volatile("rep; outs" #bwl \
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: "+S"(addr), "+c"(count) : "d"(port)); \
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} \
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\
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static inline void ins##bwl(int port, void *addr, unsigned long count) \
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{ \
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asm volatile("rep; ins" #bwl \
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: "+D"(addr), "+c"(count) : "d"(port)); \
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}
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BUILDIO(b, b, char)
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BUILDIO(w, w, short)
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BUILDIO(l, , int)
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extern void *xlate_dev_mem_ptr(unsigned long phys);
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extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
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@ -1,161 +0,0 @@
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#ifndef _ASM_X86_IO_32_H
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#define _ASM_X86_IO_32_H
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#include <linux/string.h>
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#include <linux/compiler.h>
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/*
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* This file contains the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*
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* This file is not meant to be obfuscating: it's just complicated
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* to (a) handle it all in a way that makes gcc able to optimize it
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* as well as possible and (b) trying to avoid writing the same thing
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* over and over again with slight variations and possibly making a
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* mistake somewhere.
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*/
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/*
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* Thanks to James van Artsdalen for a better timing-fix than
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* the two short jumps: using outb's to a nonexistent port seems
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* to guarantee better timings even on fast machines.
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*
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* On the other hand, I'd like to be sure of a non-existent port:
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* I feel a bit unsafe about using 0x80 (should be safe, though)
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*
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* Linus
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*/
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/*
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* Bit simplified and optimized by Jan Hubicka
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* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
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*
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* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
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* isa_read[wl] and isa_write[wl] fixed
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* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
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*/
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#ifdef __KERNEL__
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#include <asm-generic/iomap.h>
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#include <linux/vmalloc.h>
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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static inline void
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memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
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{
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memset((void __force *)addr, val, count);
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}
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static inline void
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memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
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{
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memcpy(dst, (const void __force *)src, count);
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}
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static inline void
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memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
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{
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memcpy((void __force *)dst, src, count);
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}
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/*
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* ISA space is 'always mapped' on a typical x86 system, no need to
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* explicitly ioremap() it. The fact that the ISA IO space is mapped
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* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
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* are physical addresses. The following constant pointer can be
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* used as the IO-area pointer (it can be iounmapped as well, so the
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* analogy with PCI is quite large):
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*/
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#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
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/*
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* Cache management
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*
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* This needed for two cases
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* 1. Out of order aware processors
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* 2. Accidentally out of order processors (PPro errata #51)
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*/
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static inline void flush_write_buffers(void)
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{
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#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
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asm volatile("lock; addl $0,0(%%esp)": : :"memory");
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#endif
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}
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#endif /* __KERNEL__ */
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extern void native_io_delay(void);
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extern int io_delay_type;
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extern void io_delay_init(void);
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#if defined(CONFIG_PARAVIRT)
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#include <asm/paravirt.h>
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#else
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static inline void slow_down_io(void)
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{
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native_io_delay();
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#ifdef REALLY_SLOW_IO
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native_io_delay();
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native_io_delay();
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native_io_delay();
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#endif
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}
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#endif
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#define BUILDIO(bwl, bw, type) \
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static inline void out##bwl(unsigned type value, int port) \
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{ \
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asm volatile("out" #bwl " %" #bw "0, %w1" \
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: : "a"(value), "Nd"(port)); \
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} \
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\
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static inline unsigned type in##bwl(int port) \
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{ \
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unsigned type value; \
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asm volatile("in" #bwl " %w1, %" #bw "0" \
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: "=a"(value) : "Nd"(port)); \
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return value; \
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} \
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\
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static inline void out##bwl##_p(unsigned type value, int port) \
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{ \
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out##bwl(value, port); \
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slow_down_io(); \
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} \
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\
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static inline unsigned type in##bwl##_p(int port) \
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{ \
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unsigned type value = in##bwl(port); \
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slow_down_io(); \
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return value; \
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} \
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\
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static inline void outs##bwl(int port, const void *addr, unsigned long count) \
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{ \
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asm volatile("rep; outs" #bwl \
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: "+S"(addr), "+c"(count) : "d"(port)); \
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} \
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\
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static inline void ins##bwl(int port, void *addr, unsigned long count) \
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{ \
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asm volatile("rep; ins" #bwl \
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: "+D"(addr), "+c"(count) : "d"(port)); \
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}
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BUILDIO(b, b, char)
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BUILDIO(w, w, short)
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BUILDIO(l, , int)
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#endif /* _ASM_X86_IO_32_H */
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@ -1,161 +0,0 @@
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#ifndef _ASM_X86_IO_64_H
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#define _ASM_X86_IO_64_H
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#include <linux/string.h>
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#include <linux/compiler.h>
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/*
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* This file contains the definitions for the x86 IO instructions
|
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
|
||||
* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
|
||||
* versions of the single-IO instructions (inb_p/inw_p/..).
|
||||
*
|
||||
* This file is not meant to be obfuscating: it's just complicated
|
||||
* to (a) handle it all in a way that makes gcc able to optimize it
|
||||
* as well as possible and (b) trying to avoid writing the same thing
|
||||
* over and over again with slight variations and possibly making a
|
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* mistake somewhere.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Thanks to James van Artsdalen for a better timing-fix than
|
||||
* the two short jumps: using outb's to a nonexistent port seems
|
||||
* to guarantee better timings even on fast machines.
|
||||
*
|
||||
* On the other hand, I'd like to be sure of a non-existent port:
|
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* I feel a bit unsafe about using 0x80 (should be safe, though)
|
||||
*
|
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* Linus
|
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*/
|
||||
|
||||
/*
|
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* Bit simplified and optimized by Jan Hubicka
|
||||
* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
|
||||
*
|
||||
* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
|
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* isa_read[wl] and isa_write[wl] fixed
|
||||
* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
|
||||
*/
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||||
|
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#ifdef __KERNEL__
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|
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#include <asm-generic/iomap.h>
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|
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#include <linux/vmalloc.h>
|
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|
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/*
|
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* Convert a virtual cached pointer to an uncached pointer
|
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*/
|
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#define xlate_dev_kmem_ptr(p) p
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|
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static inline void
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memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
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{
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memset((void __force *)addr, val, count);
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}
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static inline void
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memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
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{
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memcpy(dst, (const void __force *)src, count);
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}
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static inline void
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memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
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{
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memcpy((void __force *)dst, src, count);
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}
|
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|
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/*
|
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* ISA space is 'always mapped' on a typical x86 system, no need to
|
||||
* explicitly ioremap() it. The fact that the ISA IO space is mapped
|
||||
* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
|
||||
* are physical addresses. The following constant pointer can be
|
||||
* used as the IO-area pointer (it can be iounmapped as well, so the
|
||||
* analogy with PCI is quite large):
|
||||
*/
|
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#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
|
||||
|
||||
/*
|
||||
* Cache management
|
||||
*
|
||||
* This needed for two cases
|
||||
* 1. Out of order aware processors
|
||||
* 2. Accidentally out of order processors (PPro errata #51)
|
||||
*/
|
||||
|
||||
static inline void flush_write_buffers(void)
|
||||
{
|
||||
#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
|
||||
asm volatile("lock; addl $0,0(%%esp)": : :"memory");
|
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#endif
|
||||
}
|
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|
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#endif /* __KERNEL__ */
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|
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extern void native_io_delay(void);
|
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|
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extern int io_delay_type;
|
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extern void io_delay_init(void);
|
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|
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#if defined(CONFIG_PARAVIRT)
|
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#include <asm/paravirt.h>
|
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#else
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|
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static inline void slow_down_io(void)
|
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{
|
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native_io_delay();
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#ifdef REALLY_SLOW_IO
|
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native_io_delay();
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native_io_delay();
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native_io_delay();
|
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#endif
|
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}
|
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|
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#endif
|
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|
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#define BUILDIO(bwl, bw, type) \
|
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static inline void out##bwl(unsigned type value, int port) \
|
||||
{ \
|
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asm volatile("out" #bwl " %" #bw "0, %w1" \
|
||||
: : "a"(value), "Nd"(port)); \
|
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} \
|
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\
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static inline unsigned type in##bwl(int port) \
|
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{ \
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unsigned type value; \
|
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asm volatile("in" #bwl " %w1, %" #bw "0" \
|
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: "=a"(value) : "Nd"(port)); \
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return value; \
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} \
|
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\
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static inline void out##bwl##_p(unsigned type value, int port) \
|
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{ \
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out##bwl(value, port); \
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slow_down_io(); \
|
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} \
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\
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static inline unsigned type in##bwl##_p(int port) \
|
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{ \
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unsigned type value = in##bwl(port); \
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slow_down_io(); \
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return value; \
|
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} \
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\
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static inline void outs##bwl(int port, const void *addr, unsigned long count) \
|
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{ \
|
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asm volatile("rep; outs" #bwl \
|
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: "+S"(addr), "+c"(count) : "d"(port)); \
|
||||
} \
|
||||
\
|
||||
static inline void ins##bwl(int port, void *addr, unsigned long count) \
|
||||
{ \
|
||||
asm volatile("rep; ins" #bwl \
|
||||
: "+D"(addr), "+c"(count) : "d"(port)); \
|
||||
}
|
||||
|
||||
BUILDIO(b, b, char)
|
||||
BUILDIO(w, w, short)
|
||||
BUILDIO(l, , int)
|
||||
|
||||
#endif /* _ASM_X86_IO_64_H */
|
Loading…
Reference in New Issue