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ipr: differentiate pci-x and pci-e based adapters 

MSI has only been tested on and known to work with PCI-E based adapters.  This
patch adds a field to struct ipr_chip_t to indicate which type of interrupt to
use based on what is known about the chip.

Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com>
Acked-by: Brian King <brking@linux.vnet.ibm.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
This commit is contained in:
Wayne Boyer 2009-06-17 09:55:35 -07:00 committed by James Bottomley
parent 95fecd9039
commit 1be7bd82bf
2 changed files with 21 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
drivers/scsi/ipr.c
View File

@ -131,13 +131,13 @@ static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
}; };
static const struct ipr_chip_t ipr_chip[] = { static const struct ipr_chip_t ipr_chip[] = {
{ PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, &ipr_chip_cfg[0] }, { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, &ipr_chip_cfg[0] },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, &ipr_chip_cfg[0] }, { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, &ipr_chip_cfg[0] },
{ PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, &ipr_chip_cfg[0] }, { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, &ipr_chip_cfg[0] },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, &ipr_chip_cfg[0] }, { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, &ipr_chip_cfg[0] },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, &ipr_chip_cfg[0] }, { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, &ipr_chip_cfg[0] },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, &ipr_chip_cfg[1] }, { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, &ipr_chip_cfg[1] },
{ PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, &ipr_chip_cfg[1] } { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, &ipr_chip_cfg[1] }
}; };
static int ipr_max_bus_speeds [] = { static int ipr_max_bus_speeds [] = {
@ -7399,21 +7399,21 @@ static void __devinit ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
} }
/** /**
* ipr_get_chip_cfg - Find adapter chip configuration * ipr_get_chip_info - Find adapter chip information
* @dev_id: PCI device id struct * @dev_id: PCI device id struct
* *
* Return value: * Return value:
* ptr to chip config on success / NULL on failure * ptr to chip information on success / NULL on failure
**/ **/
static const struct ipr_chip_cfg_t * __devinit static const struct ipr_chip_t * __devinit
ipr_get_chip_cfg(const struct pci_device_id *dev_id) ipr_get_chip_info(const struct pci_device_id *dev_id)
{ {
int i; int i;
for (i = 0; i < ARRAY_SIZE(ipr_chip); i++) for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
if (ipr_chip[i].vendor == dev_id->vendor && if (ipr_chip[i].vendor == dev_id->vendor &&
ipr_chip[i].device == dev_id->device) ipr_chip[i].device == dev_id->device)
return ipr_chip[i].cfg; return &ipr_chip[i];
return NULL; return NULL;
} }
@ -7540,14 +7540,16 @@ static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
ata_host_init(&ioa_cfg->ata_host, &pdev->dev, ata_host_init(&ioa_cfg->ata_host, &pdev->dev,
sata_port_info.flags, &ipr_sata_ops); sata_port_info.flags, &ipr_sata_ops);
ioa_cfg->chip_cfg = ipr_get_chip_cfg(dev_id); ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
if (!ioa_cfg->chip_cfg) { if (!ioa_cfg->ipr_chip) {
dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n", dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
dev_id->vendor, dev_id->device); dev_id->vendor, dev_id->device);
goto out_scsi_host_put; goto out_scsi_host_put;
} }
ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
if (ipr_transop_timeout) if (ipr_transop_timeout)
ioa_cfg->transop_timeout = ipr_transop_timeout; ioa_cfg->transop_timeout = ipr_transop_timeout;
else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT) else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
@ -7599,7 +7601,7 @@ static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
} }
/* Enable MSI style interrupts if they are supported. */ /* Enable MSI style interrupts if they are supported. */
if (!(rc = pci_enable_msi(pdev))) { if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI && !pci_enable_msi(pdev)) {
rc = ipr_test_msi(ioa_cfg, pdev); rc = ipr_test_msi(ioa_cfg, pdev);
if (rc == -EOPNOTSUPP) if (rc == -EOPNOTSUPP)
pci_disable_msi(pdev); pci_disable_msi(pdev);

4
drivers/scsi/ipr.h
View File

@ -1025,6 +1025,9 @@ struct ipr_chip_cfg_t {
struct ipr_chip_t { struct ipr_chip_t {
u16 vendor; u16 vendor;
u16 device; u16 device;
u16 intr_type;
#define IPR_USE_LSI 0x00
#define IPR_USE_MSI 0x01
const struct ipr_chip_cfg_t *cfg; const struct ipr_chip_cfg_t *cfg;
}; };
@ -1160,6 +1163,7 @@ struct ipr_ioa_cfg {
unsigned int transop_timeout; unsigned int transop_timeout;
const struct ipr_chip_cfg_t *chip_cfg; const struct ipr_chip_cfg_t *chip_cfg;
const struct ipr_chip_t *ipr_chip;
void __iomem *hdw_dma_regs; /* iomapped PCI memory space */ void __iomem *hdw_dma_regs; /* iomapped PCI memory space */
unsigned long hdw_dma_regs_pci; /* raw PCI memory space */ unsigned long hdw_dma_regs_pci; /* raw PCI memory space */